Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Soby Mathew | 96a1c6b | 2018-01-15 14:45:33 +0000 | [diff] [blame] | 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | #ifndef __BOARD_ARM_DEF_H__ |
| 7 | #define __BOARD_ARM_DEF_H__ |
| 8 | |
| 9 | #include <v2m_def.h> |
| 10 | |
| 11 | |
| 12 | /* |
| 13 | * Required platform porting definitions common to all ARM |
| 14 | * development platforms |
| 15 | */ |
| 16 | |
| 17 | /* Size of cacheable stacks */ |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 18 | #if defined(IMAGE_BL1) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 19 | #if TRUSTED_BOARD_BOOT |
| 20 | # define PLATFORM_STACK_SIZE 0x1000 |
| 21 | #else |
| 22 | # define PLATFORM_STACK_SIZE 0x440 |
| 23 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 24 | #elif defined(IMAGE_BL2) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 25 | # if TRUSTED_BOARD_BOOT |
| 26 | # define PLATFORM_STACK_SIZE 0x1000 |
| 27 | # else |
| 28 | # define PLATFORM_STACK_SIZE 0x400 |
| 29 | # endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 30 | #elif defined(IMAGE_BL2U) |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 31 | # define PLATFORM_STACK_SIZE 0x200 |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 32 | #elif defined(IMAGE_BL31) |
Roberto Vargas | 550eb08 | 2018-01-05 16:00:05 +0000 | [diff] [blame] | 33 | #ifdef PLAT_XLAT_TABLES_DYNAMIC |
| 34 | # define PLATFORM_STACK_SIZE 0x800 |
| 35 | #else |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 36 | # define PLATFORM_STACK_SIZE 0x400 |
Roberto Vargas | 550eb08 | 2018-01-05 16:00:05 +0000 | [diff] [blame] | 37 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 38 | #elif defined(IMAGE_BL32) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 39 | # define PLATFORM_STACK_SIZE 0x440 |
| 40 | #endif |
| 41 | |
| 42 | /* |
Vikram Kanigiri | eade34c | 2016-01-20 15:57:35 +0000 | [diff] [blame] | 43 | * The constants below are not optimised for memory usage. Platforms that wish |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 44 | * to optimise these constants should set `ARM_BOARD_OPTIMISE_MEM` to 1 and |
Vikram Kanigiri | eade34c | 2016-01-20 15:57:35 +0000 | [diff] [blame] | 45 | * provide there own values. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 46 | */ |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 47 | #if !ARM_BOARD_OPTIMISE_MEM |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 48 | /* |
Vikram Kanigiri | eade34c | 2016-01-20 15:57:35 +0000 | [diff] [blame] | 49 | * PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the |
| 50 | * plat_arm_mmap array defined for each BL stage. |
| 51 | * |
| 52 | * Provide relatively optimised values for the runtime images (BL31 and BL32). |
| 53 | * Optimisation is less important for the other, transient boot images so a |
| 54 | * common, maximum value is used across these images. |
Antonio Nino Diaz | ac99803 | 2017-02-27 17:23:54 +0000 | [diff] [blame] | 55 | * |
| 56 | * They are also used for the dynamically mapped regions in the images that |
| 57 | * enable dynamic memory mapping. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 58 | */ |
Antonio Nino Diaz | 7289f92 | 2017-11-09 11:34:09 +0000 | [diff] [blame] | 59 | #if defined(IMAGE_BL31) |
| 60 | # if ENABLE_SPM |
| 61 | # define PLAT_ARM_MMAP_ENTRIES 9 |
| 62 | # define MAX_XLAT_TABLES 7 |
| 63 | # define PLAT_SP_IMAGE_MMAP_REGIONS 7 |
| 64 | # define PLAT_SP_IMAGE_MAX_XLAT_TABLES 10 |
| 65 | # else |
Roberto Vargas | 550eb08 | 2018-01-05 16:00:05 +0000 | [diff] [blame] | 66 | # define PLAT_ARM_MMAP_ENTRIES 8 |
Antonio Nino Diaz | 7289f92 | 2017-11-09 11:34:09 +0000 | [diff] [blame] | 67 | # define MAX_XLAT_TABLES 5 |
| 68 | # endif |
| 69 | #elif defined(IMAGE_BL32) |
Roberto Vargas | 550eb08 | 2018-01-05 16:00:05 +0000 | [diff] [blame] | 70 | # define PLAT_ARM_MMAP_ENTRIES 8 |
David Cunado | c3bd8c2 | 2017-10-05 21:24:14 +0100 | [diff] [blame] | 71 | # define MAX_XLAT_TABLES 5 |
David Wang | 0ba499f | 2016-03-07 11:02:57 +0800 | [diff] [blame] | 72 | #else |
David Cunado | c3bd8c2 | 2017-10-05 21:24:14 +0100 | [diff] [blame] | 73 | # define PLAT_ARM_MMAP_ENTRIES 11 |
David Wang | 0ba499f | 2016-03-07 11:02:57 +0800 | [diff] [blame] | 74 | # define MAX_XLAT_TABLES 5 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 75 | #endif |
| 76 | |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 77 | /* |
| 78 | * PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size |
| 79 | * plus a little space for growth. |
| 80 | */ |
Qixiang Xu | a674feb | 2017-08-24 14:28:08 +0800 | [diff] [blame] | 81 | #define PLAT_ARM_MAX_BL1_RW_SIZE 0xB000 |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 82 | |
| 83 | /* |
| 84 | * PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a |
| 85 | * little space for growth. |
| 86 | */ |
| 87 | #if TRUSTED_BOARD_BOOT |
Qixiang Xu | de431b1 | 2017-10-13 09:23:42 +0800 | [diff] [blame] | 88 | # define PLAT_ARM_MAX_BL2_SIZE 0x1E000 |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 89 | #else |
| 90 | # define PLAT_ARM_MAX_BL2_SIZE 0xF000 |
| 91 | #endif |
| 92 | |
| 93 | /* |
| 94 | * PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a |
| 95 | * little space for growth. |
| 96 | */ |
Antonio Nino Diaz | 93bd916 | 2018-05-04 12:59:45 +0100 | [diff] [blame^] | 97 | #if ENABLE_SPM |
| 98 | # define PLAT_ARM_MAX_BL31_SIZE 0x21000 |
| 99 | #else |
| 100 | # define PLAT_ARM_MAX_BL31_SIZE 0x20000 |
| 101 | #endif |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 102 | |
Soby Mathew | bf16923 | 2017-11-14 14:10:10 +0000 | [diff] [blame] | 103 | #ifdef AARCH32 |
| 104 | /* |
| 105 | * PLAT_ARM_MAX_BL32_SIZE is calculated for SP_MIN as the AArch32 Secure |
| 106 | * Payload. |
| 107 | */ |
| 108 | # define PLAT_ARM_MAX_BL32_SIZE 0x1D000 |
| 109 | #endif |
| 110 | |
Antonio Nino Diaz | 30ce3ad | 2016-07-25 12:04:31 +0100 | [diff] [blame] | 111 | #endif /* ARM_BOARD_OPTIMISE_MEM */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 112 | |
| 113 | #define MAX_IO_DEVICES 3 |
| 114 | #define MAX_IO_HANDLES 4 |
| 115 | |
| 116 | #define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */ |
| 117 | |
Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 118 | /* Reserve the last block of flash for PSCI MEM PROTECT flag */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 119 | #define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE |
Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 120 | #define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 121 | |
Yatharth Kochar | f11b29a | 2016-02-01 11:04:46 +0000 | [diff] [blame] | 122 | #define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE |
Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 123 | #define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) |
| 124 | |
| 125 | /* PSCI memory protect definitions: |
| 126 | * This variable is stored in a non-secure flash because some ARM reference |
| 127 | * platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT |
| 128 | * support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions. |
| 129 | */ |
| 130 | #define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \ |
| 131 | V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) |
Yatharth Kochar | f11b29a | 2016-02-01 11:04:46 +0000 | [diff] [blame] | 132 | |
Roberto Vargas | a1c16b6 | 2017-08-03 09:16:43 +0100 | [diff] [blame] | 133 | /* |
| 134 | * Map mem_protect flash region with read and write permissions |
| 135 | */ |
| 136 | #define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \ |
| 137 | V2M_FLASH_BLOCK_SIZE, \ |
| 138 | MT_DEVICE | MT_RW | MT_SECURE) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 139 | |
| 140 | #endif /* __BOARD_ARM_DEF_H__ */ |