blob: 689f8bbb82b33814438ef3b6a04da9493f25470d [file] [log] [blame]
Varun Wadekarb3741032017-09-25 13:27:45 -07001/*
2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef INTF_H
8#define INTF_H
9
10/**
11 * Flags used in IPC req
12 */
13#define FLAG_DO_ACK (U(1) << 0)
14#define FLAG_RING_DOORBELL (U(1) << 1)
15
16/* Bit 1 is designated for CCPlex in secure world */
17#define HSP_MASTER_CCPLEX_BIT (U(1) << 1)
18/* Bit 19 is designated for BPMP in non-secure world */
19#define HSP_MASTER_BPMP_BIT (U(1) << 19)
20/* Timeout to receive response from BPMP is 1 sec */
21#define TIMEOUT_RESPONSE_FROM_BPMP_US U(1000000) /* in microseconds */
22
23/**
24 * IVC protocol defines and command/response frame
25 */
26
27/**
28 * IVC specific defines
29 */
30#define IVC_CMD_SZ_BYTES U(128)
31#define IVC_DATA_SZ_BYTES U(120)
32
33/**
34 * Holds frame data for an IPC request
35 */
36struct frame_data {
37 /* Identification as to what kind of data is being transmitted */
38 uint32_t mrq;
39
40 /* Flags for slave as to how to respond back */
41 uint32_t flags;
42
43 /* Actual data being sent */
44 uint8_t data[IVC_DATA_SZ_BYTES];
45};
46
47/**
48 * Commands send to the BPMP firmware
49 */
50
51/**
52 * MRQ code to issue a module reset command to BPMP
53 */
54#define MRQ_RESET U(20)
55
56/**
57 * Reset sub-commands
58 */
59#define CMD_RESET_ASSERT U(1)
60#define CMD_RESET_DEASSERT U(2)
61#define CMD_RESET_MODULE U(3)
62
63/**
64 * Used by the sender of an #MRQ_RESET message to request BPMP to
65 * assert or deassert a given reset line.
66 */
67struct __attribute__((packed)) mrq_reset_request {
68 /* reset action to perform (mrq_reset_commands) */
69 uint32_t cmd;
70 /* id of the reset to affected */
71 uint32_t reset_id;
72};
73
74#endif /* INTF_H */