Chandni Cherukuri | f3a6cab | 2020-09-22 18:56:25 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <common/debug.h> |
| 8 | #include <drivers/arm/css/css_mhu_doorbell.h> |
| 9 | #include <drivers/arm/css/scmi.h> |
| 10 | #include <drivers/arm/css/sds.h> |
| 11 | #include <plat/arm/common/plat_arm.h> |
| 12 | |
| 13 | #include "morello_def.h" |
| 14 | #include <platform_def.h> |
| 15 | |
| 16 | /* |
| 17 | * Platform information structure stored in SDS. |
| 18 | * This structure holds information about platform's DDR |
| 19 | * size which is an information about multichip setup |
| 20 | * - multichip mode |
| 21 | * - slave_count |
| 22 | * - Local DDR size in GB, DDR memory in master board |
| 23 | * - Remote DDR size in GB, DDR memory in slave board |
| 24 | */ |
| 25 | struct morello_plat_info { |
| 26 | bool multichip_mode; |
| 27 | uint8_t slave_count; |
| 28 | uint8_t local_ddr_size; |
| 29 | uint8_t remote_ddr_size; |
| 30 | } __packed; |
| 31 | |
| 32 | /* |
| 33 | * BL33 image information structure stored in SDS. |
| 34 | * This structure holds the source & destination addresses and |
| 35 | * the size of the BL33 image which will be loaded by BL31. |
| 36 | */ |
| 37 | struct morello_bl33_info { |
| 38 | uint32_t bl33_src_addr; |
| 39 | uint32_t bl33_dst_addr; |
| 40 | uint32_t bl33_size; |
| 41 | }; |
| 42 | |
| 43 | static scmi_channel_plat_info_t morello_scmi_plat_info = { |
| 44 | .scmi_mbx_mem = MORELLO_SCMI_PAYLOAD_BASE, |
| 45 | .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, |
| 46 | .db_preserve_mask = 0xfffffffe, |
| 47 | .db_modify_mask = 0x1, |
| 48 | .ring_doorbell = &mhu_ring_doorbell |
| 49 | }; |
| 50 | |
Chandni Cherukuri | c5a0c37 | 2020-10-01 10:11:44 +0530 | [diff] [blame] | 51 | scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id) |
Chandni Cherukuri | f3a6cab | 2020-09-22 18:56:25 +0530 | [diff] [blame] | 52 | { |
| 53 | return &morello_scmi_plat_info; |
| 54 | } |
| 55 | |
| 56 | const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops) |
| 57 | { |
| 58 | return css_scmi_override_pm_ops(ops); |
| 59 | } |
| 60 | |
| 61 | static void copy_bl33(uint32_t src, uint32_t dst, uint32_t size) |
| 62 | { |
| 63 | unsigned int i; |
| 64 | |
| 65 | INFO("Copying BL33 to DDR memory...\n"); |
| 66 | for (i = 0U; i < size; (i = i + 8U)) |
| 67 | mmio_write_64((dst + i), mmio_read_64(src + i)); |
| 68 | |
| 69 | for (i = 0U; i < size; (i = i + 8U)) { |
| 70 | if (mmio_read_64(src + i) != mmio_read_64(dst + i)) { |
| 71 | ERROR("Copy failed!\n"); |
| 72 | panic(); |
| 73 | } |
| 74 | } |
| 75 | INFO("done\n"); |
| 76 | } |
| 77 | |
| 78 | void bl31_platform_setup(void) |
| 79 | { |
| 80 | int ret; |
| 81 | struct morello_plat_info plat_info; |
| 82 | struct morello_bl33_info bl33_info; |
| 83 | |
| 84 | ret = sds_init(); |
| 85 | if (ret != SDS_OK) { |
| 86 | ERROR("SDS initialization failed. ret:%d\n", ret); |
| 87 | panic(); |
| 88 | } |
| 89 | |
| 90 | ret = sds_struct_read(MORELLO_SDS_PLATFORM_INFO_STRUCT_ID, |
| 91 | MORELLO_SDS_PLATFORM_INFO_OFFSET, |
| 92 | &plat_info, |
| 93 | MORELLO_SDS_PLATFORM_INFO_SIZE, |
| 94 | SDS_ACCESS_MODE_NON_CACHED); |
| 95 | if (ret != SDS_OK) { |
| 96 | ERROR("Error getting platform info from SDS. ret:%d\n", ret); |
| 97 | panic(); |
| 98 | } |
| 99 | |
| 100 | /* Validate plat_info SDS */ |
| 101 | if ((plat_info.local_ddr_size == 0U) |
| 102 | || (plat_info.local_ddr_size > MORELLO_MAX_DDR_CAPACITY_GB) |
| 103 | || (plat_info.remote_ddr_size > MORELLO_MAX_DDR_CAPACITY_GB) |
| 104 | || (plat_info.slave_count > MORELLO_MAX_SLAVE_COUNT)) { |
| 105 | ERROR("platform info SDS is corrupted\n"); |
| 106 | panic(); |
| 107 | } |
| 108 | |
| 109 | arm_bl31_platform_setup(); |
| 110 | |
| 111 | ret = sds_struct_read(MORELLO_SDS_BL33_INFO_STRUCT_ID, |
| 112 | MORELLO_SDS_BL33_INFO_OFFSET, |
| 113 | &bl33_info, |
| 114 | MORELLO_SDS_BL33_INFO_SIZE, |
| 115 | SDS_ACCESS_MODE_NON_CACHED); |
| 116 | if (ret != SDS_OK) { |
| 117 | ERROR("Error getting BL33 info from SDS. ret:%d\n", ret); |
| 118 | panic(); |
| 119 | } |
| 120 | copy_bl33(bl33_info.bl33_src_addr, |
| 121 | bl33_info.bl33_dst_addr, |
| 122 | bl33_info.bl33_size); |
| 123 | /* |
| 124 | * Pass platform information to BL33. This method is followed as |
| 125 | * currently there is no BL1/BL2 involved in boot flow of MORELLO. |
| 126 | * When TBBR is implemented for MORELLO, this method should be removed |
| 127 | * and platform information should be passed to BL33 using NT_FW_CONFIG |
| 128 | * passing mechanism. |
| 129 | */ |
| 130 | mmio_write_32(MORELLO_PLATFORM_INFO_BASE, *(uint32_t *)&plat_info); |
| 131 | } |