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Soby Mathewacc144b2016-05-05 12:53:53 +01001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soby Mathewacc144b2016-05-05 12:53:53 +01005 */
6
7#ifndef __SMCC_HELPERS_H__
8#define __SMCC_HELPERS_H__
9
10#include <smcc.h>
11
12/* These are offsets to registers in smc_ctx_t */
13#define SMC_CTX_GPREG_R0 0x0
14#define SMC_CTX_GPREG_R1 0x4
15#define SMC_CTX_GPREG_R2 0x8
16#define SMC_CTX_GPREG_R3 0xC
17#define SMC_CTX_GPREG_R4 0x10
Soby Mathewadb70272016-12-06 12:10:51 +000018#define SMC_CTX_GPREG_R5 0x14
Soby Mathewacc144b2016-05-05 12:53:53 +010019#define SMC_CTX_SP_USR 0x34
20#define SMC_CTX_SPSR_MON 0x78
Soby Mathewf3e3a432017-03-30 14:42:54 +010021#define SMC_CTX_SP_MON 0x7C
22#define SMC_CTX_LR_MON 0x80
23#define SMC_CTX_SCR 0x84
24#define SMC_CTX_SIZE 0x88
Soby Mathewacc144b2016-05-05 12:53:53 +010025
26#ifndef __ASSEMBLY__
27#include <cassert.h>
28#include <types.h>
29
30/*
31 * The generic structure to save arguments and callee saved registers during
32 * an SMC. Also this structure is used to store the result return values after
33 * the completion of SMC service.
34 */
35typedef struct smc_ctx {
36 u_register_t r0;
37 u_register_t r1;
38 u_register_t r2;
39 u_register_t r3;
40 u_register_t r4;
41 u_register_t r5;
42 u_register_t r6;
43 u_register_t r7;
44 u_register_t r8;
45 u_register_t r9;
46 u_register_t r10;
47 u_register_t r11;
48 u_register_t r12;
49 /* spsr_usr doesn't exist */
50 u_register_t sp_usr;
51 u_register_t lr_usr;
52 u_register_t spsr_irq;
53 u_register_t sp_irq;
54 u_register_t lr_irq;
55 u_register_t spsr_fiq;
56 u_register_t sp_fiq;
57 u_register_t lr_fiq;
58 u_register_t spsr_svc;
59 u_register_t sp_svc;
60 u_register_t lr_svc;
61 u_register_t spsr_abt;
62 u_register_t sp_abt;
63 u_register_t lr_abt;
64 u_register_t spsr_und;
65 u_register_t sp_und;
66 u_register_t lr_und;
67 u_register_t spsr_mon;
Soby Mathewf3e3a432017-03-30 14:42:54 +010068 /*
69 * `sp_mon` will point to the C runtime stack in monitor mode. But prior
70 * to exit from SMC, this will point to the `smc_ctx_t` so that
71 * on next entry due to SMC, the `smc_ctx_t` can be easily accessed.
72 */
73 u_register_t sp_mon;
Soby Mathewacc144b2016-05-05 12:53:53 +010074 u_register_t lr_mon;
Soby Mathewf3e3a432017-03-30 14:42:54 +010075 u_register_t scr;
Soby Mathewacc144b2016-05-05 12:53:53 +010076} smc_ctx_t;
77
78/*
79 * Compile time assertions related to the 'smc_context' structure to
80 * ensure that the assembler and the compiler view of the offsets of
81 * the structure members is the same.
82 */
83CASSERT(SMC_CTX_GPREG_R0 == __builtin_offsetof(smc_ctx_t, r0), \
84 assert_smc_ctx_greg_r0_offset_mismatch);
85CASSERT(SMC_CTX_GPREG_R1 == __builtin_offsetof(smc_ctx_t, r1), \
86 assert_smc_ctx_greg_r1_offset_mismatch);
87CASSERT(SMC_CTX_GPREG_R2 == __builtin_offsetof(smc_ctx_t, r2), \
88 assert_smc_ctx_greg_r2_offset_mismatch);
89CASSERT(SMC_CTX_GPREG_R3 == __builtin_offsetof(smc_ctx_t, r3), \
90 assert_smc_ctx_greg_r3_offset_mismatch);
91CASSERT(SMC_CTX_GPREG_R4 == __builtin_offsetof(smc_ctx_t, r4), \
92 assert_smc_ctx_greg_r4_offset_mismatch);
93CASSERT(SMC_CTX_SP_USR == __builtin_offsetof(smc_ctx_t, sp_usr), \
94 assert_smc_ctx_sp_usr_offset_mismatch);
95CASSERT(SMC_CTX_LR_MON == __builtin_offsetof(smc_ctx_t, lr_mon), \
96 assert_smc_ctx_lr_mon_offset_mismatch);
97CASSERT(SMC_CTX_SPSR_MON == __builtin_offsetof(smc_ctx_t, spsr_mon), \
98 assert_smc_ctx_spsr_mon_offset_mismatch);
99
100CASSERT(SMC_CTX_SIZE == sizeof(smc_ctx_t), assert_smc_ctx_size_mismatch);
101
102/* Convenience macros to return from SMC handler */
103#define SMC_RET0(_h) { \
104 return (uintptr_t)(_h); \
105}
106#define SMC_RET1(_h, _r0) { \
107 ((smc_ctx_t *)(_h))->r0 = (_r0); \
108 SMC_RET0(_h); \
109}
110#define SMC_RET2(_h, _r0, _r1) { \
111 ((smc_ctx_t *)(_h))->r1 = (_r1); \
112 SMC_RET1(_h, (_r0)); \
113}
114#define SMC_RET3(_h, _r0, _r1, _r2) { \
115 ((smc_ctx_t *)(_h))->r2 = (_r2); \
116 SMC_RET2(_h, (_r0), (_r1)); \
117}
118#define SMC_RET4(_h, _r0, _r1, _r2, _r3) { \
119 ((smc_ctx_t *)(_h))->r3 = (_r3); \
120 SMC_RET3(_h, (_r0), (_r1), (_r2)); \
121}
122
123/* Return a UUID in the SMC return registers */
124#define SMC_UUID_RET(_h, _uuid) \
125 SMC_RET4(handle, ((const uint32_t *) &(_uuid))[0], \
126 ((const uint32_t *) &(_uuid))[1], \
127 ((const uint32_t *) &(_uuid))[2], \
128 ((const uint32_t *) &(_uuid))[3])
129
130/*
131 * Helper macro to retrieve the SMC parameters from smc_ctx_t.
132 */
133#define get_smc_params_from_ctx(_hdl, _r1, _r2, _r3, _r4) { \
134 _r1 = ((smc_ctx_t *)_hdl)->r1; \
135 _r2 = ((smc_ctx_t *)_hdl)->r2; \
136 _r3 = ((smc_ctx_t *)_hdl)->r3; \
137 _r4 = ((smc_ctx_t *)_hdl)->r4; \
138 }
139
140/* ------------------------------------------------------------------------
141 * Helper APIs for setting and retrieving appropriate `smc_ctx_t`.
142 * These functions need to implemented by the BL including this library.
143 * ------------------------------------------------------------------------
144 */
145
146/* Get the pointer to `smc_ctx_t` corresponding to the security state. */
Etienne Carrierebfe12d32017-06-07 16:45:42 +0200147void *smc_get_ctx(unsigned int security_state);
Soby Mathewacc144b2016-05-05 12:53:53 +0100148
149/* Set the next `smc_ctx_t` corresponding to the security state. */
Etienne Carrierebfe12d32017-06-07 16:45:42 +0200150void smc_set_next_ctx(unsigned int security_state);
Soby Mathewacc144b2016-05-05 12:53:53 +0100151
152/* Get the pointer to next `smc_ctx_t` already set by `smc_set_next_ctx()`. */
153void *smc_get_next_ctx(void);
154
155#endif /*__ASSEMBLY__*/
156#endif /* __SMCC_HELPERS_H__ */