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Nariman Poushin0ece80f2018-02-26 06:52:04 +00001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <plat_arm.h>
Chandni Cherukuri0612a882018-10-16 14:15:31 +05308#include <sgi_variant.h>
Nariman Poushin0ece80f2018-02-26 06:52:04 +00009
10/* Topology */
11/*
12 * The power domain tree descriptor. The cluster power domains are
13 * arranged so that when the PSCI generic code creates the power domain tree,
14 * the indices of the CPU power domain nodes it allocates match the linear
15 * indices returned by plat_core_pos_by_mpidr().
16 */
17const unsigned char sgi_pd_tree_desc[] = {
18 PLAT_ARM_CLUSTER_COUNT,
Vishwanatha HG64f0b6f2018-05-08 17:15:37 +053019 CSS_SGI_MAX_CPUS_PER_CLUSTER,
20 CSS_SGI_MAX_CPUS_PER_CLUSTER
Nariman Poushin0ece80f2018-02-26 06:52:04 +000021};
22
Chandni Cherukuri0612a882018-10-16 14:15:31 +053023/* SGI-Clark.Helios platform consists of 16 physical CPUS and 32 threads */
24const unsigned char sgi_clark_helios_pd_tree_desc[] = {
25 PLAT_ARM_CLUSTER_COUNT,
26 CSS_SGI_MAX_CPUS_PER_CLUSTER,
27 CSS_SGI_MAX_CPUS_PER_CLUSTER,
28 CSS_SGI_MAX_PE_PER_CPU,
29 CSS_SGI_MAX_PE_PER_CPU,
30 CSS_SGI_MAX_PE_PER_CPU,
31 CSS_SGI_MAX_PE_PER_CPU,
32 CSS_SGI_MAX_PE_PER_CPU,
33 CSS_SGI_MAX_PE_PER_CPU,
34 CSS_SGI_MAX_PE_PER_CPU,
35 CSS_SGI_MAX_PE_PER_CPU,
36 CSS_SGI_MAX_PE_PER_CPU,
37 CSS_SGI_MAX_PE_PER_CPU,
38 CSS_SGI_MAX_PE_PER_CPU,
39 CSS_SGI_MAX_PE_PER_CPU,
40 CSS_SGI_MAX_PE_PER_CPU,
41 CSS_SGI_MAX_PE_PER_CPU,
42 CSS_SGI_MAX_PE_PER_CPU,
43 CSS_SGI_MAX_PE_PER_CPU
44};
45
Nariman Poushin0ece80f2018-02-26 06:52:04 +000046/*******************************************************************************
47 * This function returns the topology tree information.
48 ******************************************************************************/
49const unsigned char *plat_get_power_domain_tree_desc(void)
50{
Chandni Cherukuri0612a882018-10-16 14:15:31 +053051 if (sgi_plat_info.platform_id == SGI_CLARK_SID_VER_PART_NUM &&
52 sgi_plat_info.config_id == SGI_CLARK_HELIOS_CONFIG_ID)
53 return sgi_clark_helios_pd_tree_desc;
54 else
55 return sgi_pd_tree_desc;
Nariman Poushin0ece80f2018-02-26 06:52:04 +000056}
57
58/*******************************************************************************
59 * This function returns the core count within the cluster corresponding to
60 * `mpidr`.
61 ******************************************************************************/
62unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
63{
Chandni Cherukuria5d44ec2018-08-14 15:25:34 +053064 return CSS_SGI_MAX_CPUS_PER_CLUSTER;
Nariman Poushin0ece80f2018-02-26 06:52:04 +000065}
Chandni Cherukurid61a7052018-08-01 15:58:48 +053066
67/*******************************************************************************
68 * The array mapping platform core position (implemented by plat_my_core_pos())
69 * to the SCMI power domain ID implemented by SCP.
70 ******************************************************************************/
71const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[32] = {
72 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
73 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
74};
Chandni Cherukuri449db452018-08-16 13:45:17 +053075
76/******************************************************************************
77 * Return the number of PE's supported by the CPU.
78 *****************************************************************************/
79unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
80{
81 return CSS_SGI_MAX_PE_PER_CPU;
82}