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Achin Gupta405406d2014-05-09 12:00:17 +01001/*
Soby Mathewda43b662015-07-08 21:45:46 +01002 * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
Achin Gupta405406d2014-05-09 12:00:17 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta405406d2014-05-09 12:00:17 +01005 */
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00006
Achin Gupta405406d2014-05-09 12:00:17 +01007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
9#include <arch_helpers.h>
10#include <plat/common/platform.h>
11
Dan Handleye2c27f52014-08-01 17:58:27 +010012#include "tsp_private.h"
Achin Gupta405406d2014-05-09 12:00:17 +010013
14/*******************************************************************************
15 * Data structure to keep track of per-cpu secure generic timer context across
16 * power management operations.
17 ******************************************************************************/
18typedef struct timer_context {
19 uint64_t cval;
20 uint32_t ctl;
21} timer_context_t;
22
23static timer_context_t pcpu_timer_context[PLATFORM_CORE_COUNT];
24
25/*******************************************************************************
26 * This function initializes the generic timer to fire every 0.5 second
27 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010028void tsp_generic_timer_start(void)
Achin Gupta405406d2014-05-09 12:00:17 +010029{
30 uint64_t cval;
31 uint32_t ctl = 0;
32
33 /* The timer will fire every 0.5 second */
34 cval = read_cntpct_el0() + (read_cntfrq_el0() >> 1);
35 write_cntps_cval_el1(cval);
36
37 /* Enable the secure physical timer */
38 set_cntp_ctl_enable(ctl);
39 write_cntps_ctl_el1(ctl);
40}
41
42/*******************************************************************************
43 * This function deasserts the timer interrupt and sets it up again
44 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010045void tsp_generic_timer_handler(void)
Achin Gupta405406d2014-05-09 12:00:17 +010046{
47 /* Ensure that the timer did assert the interrupt */
48 assert(get_cntp_ctl_istatus(read_cntps_ctl_el1()));
49
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010050 /*
51 * Disable the timer and reprogram it. The barriers ensure that there is
52 * no reordering of instructions around the reprogramming code.
53 */
54 isb();
Achin Gupta405406d2014-05-09 12:00:17 +010055 write_cntps_ctl_el1(0);
56 tsp_generic_timer_start();
Sandrine Bailleux1fe43362014-07-17 09:56:29 +010057 isb();
Achin Gupta405406d2014-05-09 12:00:17 +010058}
59
60/*******************************************************************************
61 * This function deasserts the timer interrupt prior to cpu power down
62 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010063void tsp_generic_timer_stop(void)
Achin Gupta405406d2014-05-09 12:00:17 +010064{
65 /* Disable the timer */
66 write_cntps_ctl_el1(0);
67}
68
69/*******************************************************************************
70 * This function saves the timer context prior to cpu suspension
71 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010072void tsp_generic_timer_save(void)
Achin Gupta405406d2014-05-09 12:00:17 +010073{
Soby Mathewda43b662015-07-08 21:45:46 +010074 uint32_t linear_id = plat_my_core_pos();
Achin Gupta405406d2014-05-09 12:00:17 +010075
76 pcpu_timer_context[linear_id].cval = read_cntps_cval_el1();
77 pcpu_timer_context[linear_id].ctl = read_cntps_ctl_el1();
78 flush_dcache_range((uint64_t) &pcpu_timer_context[linear_id],
79 sizeof(pcpu_timer_context[linear_id]));
80}
81
82/*******************************************************************************
83 * This function restores the timer context post cpu resummption
84 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010085void tsp_generic_timer_restore(void)
Achin Gupta405406d2014-05-09 12:00:17 +010086{
Soby Mathewda43b662015-07-08 21:45:46 +010087 uint32_t linear_id = plat_my_core_pos();
Achin Gupta405406d2014-05-09 12:00:17 +010088
89 write_cntps_cval_el1(pcpu_timer_context[linear_id].cval);
90 write_cntps_ctl_el1(pcpu_timer_context[linear_id].ctl);
91}