| Nariman Poushin | c703f90 | 2018-03-07 10:29:57 +0000 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | CSS_SGM_BASE := plat/arm/css/sgm |
| 8 | |
| 9 | PLAT_INCLUDES := -I${CSS_SGM_BASE}/include |
| 10 | |
| 11 | PLAT_BL_COMMON_SOURCES := ${CSS_SGM_BASE}/sgm_mmap_config.c \ |
| 12 | ${CSS_SGM_BASE}/aarch64/css_sgm_helpers.S |
| 13 | |
| 14 | SECURITY_SOURCES := drivers/arm/tzc/tzc_dmc500.c \ |
| 15 | plat/arm/common/arm_tzc_dmc500.c \ |
| 16 | ${CSS_SGM_BASE}/sgm_security.c |
| 17 | |
| 18 | SGM_CPU_SOURCES := lib/cpus/aarch64/cortex_a55.S \ |
| 19 | lib/cpus/aarch64/cortex_a75.S |
| 20 | |
| 21 | INTERCONNECT_SOURCES := ${CSS_SGM_BASE}/sgm_interconnect.c |
| 22 | |
| 23 | SGM_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ |
| 24 | drivers/arm/gic/v3/gicv3_main.c \ |
| 25 | drivers/arm/gic/v3/gicv3_helpers.c \ |
| 26 | plat/common/plat_gicv3.c \ |
| 27 | plat/arm/common/arm_gicv3.c \ |
| 28 | drivers/arm/gic/v3/gic600.c \ |
| 29 | drivers/arm/gic/v3/arm_gicv3_common.c |
| 30 | |
| 31 | BL1_SOURCES += $(SGM_CPU_SOURCES) \ |
| 32 | ${INTERCONNECT_SOURCES} \ |
| 33 | ${CSS_SGM_BASE}/sgm_bl1_setup.c \ |
| 34 | ${CSS_SGM_BASE}/sgm_plat_config.c |
| 35 | |
| 36 | BL2_SOURCES += ${SECURITY_SOURCES} |
| 37 | |
| 38 | BL2U_SOURCES += ${SECURITY_SOURCES} |
| 39 | |
| 40 | BL31_SOURCES += $(SGM_CPU_SOURCES) \ |
| 41 | ${INTERCONNECT_SOURCES} \ |
| 42 | ${SECURITY_SOURCES} \ |
| 43 | ${SGM_GIC_SOURCES} \ |
| 44 | ${CSS_SGM_BASE}/sgm_topology.c \ |
| 45 | ${CSS_SGM_BASE}/sgm_bl31_setup.c \ |
| 46 | ${CSS_SGM_BASE}/sgm_plat_config.c |
| 47 | |
| Deepak Pandey | b0971f9 | 2018-05-25 12:43:30 +0530 | [diff] [blame^] | 48 | ifneq (${RESET_TO_BL31},0) |
| 49 | $(error "Using BL31 as the reset vector is not supported on ${PLATFORM} platform. \ |
| 50 | Please set RESET_TO_BL31 to 0.") |
| 51 | endif |
| 52 | |
| Nariman Poushin | c703f90 | 2018-03-07 10:29:57 +0000 | [diff] [blame] | 53 | # sgm uses CCI-500 as Cache Coherent Interconnect |
| 54 | ARM_CCI_PRODUCT_ID := 500 |
| 55 | |
| Nariman Poushin | c703f90 | 2018-03-07 10:29:57 +0000 | [diff] [blame] | 56 | # System coherency is managed in hardware |
| 57 | HW_ASSISTED_COHERENCY := 1 |
| 58 | |
| 59 | # When building for systems with hardware-assisted coherency, there's no need to |
| 60 | # use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. |
| 61 | USE_COHERENT_MEM := 0 |
| 62 | |
| 63 | override ARM_PLAT_MT := 1 |
| 64 | |
| 65 | $(eval $(call add_define,SGM_PLAT)) |
| 66 | |
| 67 | include plat/arm/common/arm_common.mk |
| 68 | include plat/arm/board/common/board_common.mk |
| 69 | include plat/arm/css/common/css_common.mk |
| 70 | include plat/arm/soc/common/soc_css.mk |