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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz1f470022018-03-27 09:39:47 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <platform_def.h>
8
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00009#include <arch.h>
10#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/bl_common.h>
12#include <common/debug.h>
13#include <lib/xlat_tables/xlat_mmu_helpers.h>
14#include <lib/xlat_tables/xlat_tables_defs.h>
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000015
16#include "../../bl1/bl1_private.h"
17#include "rpi3_private.h"
18
19/* Data structure which holds the extents of the trusted SRAM for BL1 */
20static meminfo_t bl1_tzram_layout;
21
22meminfo_t *bl1_plat_sec_mem_layout(void)
23{
24 return &bl1_tzram_layout;
25}
26
27/*******************************************************************************
28 * Perform any BL1 specific platform actions.
29 ******************************************************************************/
30void bl1_early_platform_setup(void)
31{
32 /* Initialize the console to provide early debug support */
Antonio Nino Diaz1f470022018-03-27 09:39:47 +010033 rpi3_console_init();
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000034
35 /* Allow BL1 to see the whole Trusted RAM */
36 bl1_tzram_layout.total_base = BL_RAM_BASE;
37 bl1_tzram_layout.total_size = BL_RAM_SIZE;
38}
39
40/******************************************************************************
41 * Perform the very early platform specific architecture setup. This only
42 * does basic initialization. Later architectural setup (bl1_arch_setup())
43 * does not do anything platform specific.
44 *****************************************************************************/
45void bl1_plat_arch_setup(void)
46{
47 rpi3_setup_page_tables(bl1_tzram_layout.total_base,
48 bl1_tzram_layout.total_size,
49 BL_CODE_BASE, BL1_CODE_END,
50 BL1_RO_DATA_BASE, BL1_RO_DATA_END
51#if USE_COHERENT_MEM
52 , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END
53#endif
54 );
55
56 enable_mmu_el3(0);
57}
58
59void bl1_platform_setup(void)
60{
Antonio Nino Diazecf34712018-07-12 13:38:53 +010061 uint32_t __unused rev;
62 int __unused rc;
63
64 rc = rpi3_vc_hardware_get_board_revision(&rev);
65
66 if (rc == 0) {
67 const char __unused *model, __unused *info;
68
69 switch (rev) {
70 case 0xA02082:
71 model = "Raspberry Pi 3 Model B";
72 info = "(1GB, Sony, UK)";
73 break;
74 case 0xA22082:
75 model = "Raspberry Pi 3 Model B";
76 info = "(1GB, Embest, China)";
77 break;
78 case 0xA020D3:
79 model = "Raspberry Pi 3 Model B+";
80 info = "(1GB, Sony, UK)";
81 break;
82 default:
83 model = "Unknown";
84 info = "(Unknown)";
85 ERROR("rpi3: Unknown board revision 0x%08x\n", rev);
86 break;
87 }
88
89 NOTICE("rpi3: Detected: %s %s [0x%08x]\n", model, info, rev);
90 } else {
91 ERROR("rpi3: Unable to detect board revision\n");
92 }
93
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000094 /* Initialise the IO layer and register platform IO devices */
95 plat_rpi3_io_setup();
96}