Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 1 | /* |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 2 | * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <assert.h> |
| 32 | #include <bl_common.h> |
| 33 | #include <arch.h> |
| 34 | #include <arch_helpers.h> |
| 35 | #include <context.h> |
| 36 | #include <context_mgmt.h> |
| 37 | #include <cpu_data.h> |
| 38 | #include <debug.h> |
| 39 | #include <platform.h> |
| 40 | #include <runtime_svc.h> |
| 41 | #include <stddef.h> |
| 42 | #include "psci_private.h" |
| 43 | |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 44 | /******************************************************************************* |
| 45 | * This function saves the power state parameter passed in the current PSCI |
| 46 | * cpu_suspend call in the per-cpu data array. |
| 47 | ******************************************************************************/ |
| 48 | void psci_set_suspend_power_state(unsigned int power_state) |
| 49 | { |
| 50 | set_cpu_data(psci_svc_cpu_data.power_state, power_state); |
| 51 | flush_cpu_data(psci_svc_cpu_data.power_state); |
| 52 | } |
| 53 | |
| 54 | /******************************************************************************* |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 55 | * This function gets the power level till which the current cpu could be |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 56 | * powered down during a cpu_suspend call. Returns PSCI_INVALID_DATA if the |
| 57 | * power state is invalid. |
| 58 | ******************************************************************************/ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 59 | int psci_get_suspend_pwrlvl(void) |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 60 | { |
| 61 | unsigned int power_state; |
| 62 | |
| 63 | power_state = get_cpu_data(psci_svc_cpu_data.power_state); |
| 64 | |
| 65 | return ((power_state == PSCI_INVALID_DATA) ? |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 66 | power_state : psci_get_pstate_pwrlvl(power_state)); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | /******************************************************************************* |
| 70 | * This function gets the state id of the current cpu from the power state |
| 71 | * parameter saved in the per-cpu data array. Returns PSCI_INVALID_DATA if the |
| 72 | * power state saved is invalid. |
| 73 | ******************************************************************************/ |
| 74 | int psci_get_suspend_stateid(void) |
| 75 | { |
| 76 | unsigned int power_state; |
| 77 | |
| 78 | power_state = get_cpu_data(psci_svc_cpu_data.power_state); |
| 79 | |
| 80 | return ((power_state == PSCI_INVALID_DATA) ? |
| 81 | power_state : psci_get_pstate_id(power_state)); |
| 82 | } |
| 83 | |
| 84 | /******************************************************************************* |
| 85 | * This function gets the state id of the cpu specified by the 'mpidr' parameter |
| 86 | * from the power state parameter saved in the per-cpu data array. Returns |
| 87 | * PSCI_INVALID_DATA if the power state saved is invalid. |
| 88 | ******************************************************************************/ |
| 89 | int psci_get_suspend_stateid_by_mpidr(unsigned long mpidr) |
| 90 | { |
| 91 | unsigned int power_state; |
| 92 | |
Soby Mathew | b0082d2 | 2015-04-09 13:40:55 +0100 | [diff] [blame^] | 93 | power_state = get_cpu_data_by_index(plat_core_pos_by_mpidr(mpidr), |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 94 | psci_svc_cpu_data.power_state); |
| 95 | |
| 96 | return ((power_state == PSCI_INVALID_DATA) ? |
| 97 | power_state : psci_get_pstate_id(power_state)); |
| 98 | } |
| 99 | |
| 100 | /******************************************************************************* |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 101 | * Top level handler which is called when a cpu wants to suspend its execution. |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 102 | * It is assumed that along with suspending the cpu power domain, power domains |
| 103 | * at higher levels until the target power level will be suspended as well. |
| 104 | * It finds the highest level where a domain has to be suspended by traversing |
| 105 | * the node information and then performs generic, architectural, platform |
| 106 | * setup and state management required to suspend that power domain and domains |
| 107 | * below it. * e.g. For a cpu that's to be suspended, it could mean programming |
| 108 | * the power controller whereas for a cluster that's to be suspended, it will |
| 109 | * call the platform specific code which will disable coherency at the |
| 110 | * interconnect level if the cpu is the last in the cluster and also the |
| 111 | * program the power controller. |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 112 | * |
| 113 | * All the required parameter checks are performed at the beginning and after |
Soby Mathew | 6b8b302 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 114 | * the state transition has been done, no further error is expected and it is |
| 115 | * not possible to undo any of the actions taken beyond that point. |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 116 | ******************************************************************************/ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 117 | void psci_cpu_suspend_start(entry_point_info_t *ep, |
| 118 | int end_pwrlvl) |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 119 | { |
| 120 | int skip_wfi = 0; |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 121 | mpidr_pwr_map_nodes_t mpidr_nodes; |
| 122 | unsigned int max_phys_off_pwrlvl; |
Soby Mathew | 6b8b302 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 123 | unsigned long psci_entrypoint; |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 124 | |
| 125 | /* |
| 126 | * This function must only be called on platforms where the |
| 127 | * CPU_SUSPEND platform hooks have been implemented. |
| 128 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 129 | assert(psci_plat_pm_ops->pwr_domain_suspend && |
| 130 | psci_plat_pm_ops->pwr_domain_suspend_finish); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 131 | |
| 132 | /* |
| 133 | * Collect the pointers to the nodes in the topology tree for |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 134 | * each power domain instance in the mpidr. If this function does |
| 135 | * not return successfully then either the mpidr or the power |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 136 | * levels are incorrect. Either way, this an internal TF error |
| 137 | * therefore assert. |
| 138 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 139 | if (psci_get_pwr_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK, |
| 140 | MPIDR_AFFLVL0, end_pwrlvl, mpidr_nodes) != PSCI_E_SUCCESS) |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 141 | assert(0); |
| 142 | |
| 143 | /* |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 144 | * This function acquires the lock corresponding to each power |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 145 | * level so that by the time all locks are taken, the system topology |
| 146 | * is snapshot and state management can be done safely. |
| 147 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 148 | psci_acquire_pwr_domain_locks(MPIDR_AFFLVL0, |
| 149 | end_pwrlvl, |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 150 | mpidr_nodes); |
| 151 | |
| 152 | /* |
| 153 | * We check if there are any pending interrupts after the delay |
| 154 | * introduced by lock contention to increase the chances of early |
| 155 | * detection that a wake-up interrupt has fired. |
| 156 | */ |
| 157 | if (read_isr_el1()) { |
| 158 | skip_wfi = 1; |
| 159 | goto exit; |
| 160 | } |
| 161 | |
| 162 | /* |
| 163 | * Call the cpu suspend handler registered by the Secure Payload |
| 164 | * Dispatcher to let it do any bookeeping. If the handler encounters an |
| 165 | * error, it's expected to assert within |
| 166 | */ |
| 167 | if (psci_spd_pm && psci_spd_pm->svc_suspend) |
| 168 | psci_spd_pm->svc_suspend(0); |
| 169 | |
| 170 | /* |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 171 | * This function updates the state of each power domain instance |
| 172 | * corresponding to the mpidr in the range of power levels |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 173 | * specified. |
| 174 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 175 | psci_do_state_coordination(MPIDR_AFFLVL0, |
| 176 | end_pwrlvl, |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 177 | mpidr_nodes, |
| 178 | PSCI_STATE_SUSPEND); |
| 179 | |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 180 | max_phys_off_pwrlvl = psci_find_max_phys_off_pwrlvl(MPIDR_AFFLVL0, |
| 181 | end_pwrlvl, |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 182 | mpidr_nodes); |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 183 | assert(max_phys_off_pwrlvl != PSCI_INVALID_DATA); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 184 | |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 185 | /* |
| 186 | * Store the re-entry information for the non-secure world. |
| 187 | */ |
Soby Mathew | b0082d2 | 2015-04-09 13:40:55 +0100 | [diff] [blame^] | 188 | cm_init_my_context(ep); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 189 | |
Soby Mathew | 6b8b302 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 190 | /* Set the secure world (EL3) re-entry point after BL1 */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 191 | psci_entrypoint = (unsigned long) psci_cpu_suspend_finish_entry; |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 192 | |
| 193 | /* |
Soby Mathew | 6b8b302 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 194 | * Arch. management. Perform the necessary steps to flush all |
| 195 | * cpu caches. |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 196 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 197 | psci_do_pwrdown_cache_maintenance(max_phys_off_pwrlvl); |
Soby Mathew | 6b8b302 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 198 | |
| 199 | /* |
| 200 | * Plat. management: Allow the platform to perform the |
| 201 | * necessary actions to turn off this cpu e.g. set the |
| 202 | * platform defined mailbox with the psci entrypoint, |
| 203 | * program the power controller etc. |
| 204 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 205 | psci_plat_pm_ops->pwr_domain_suspend(psci_entrypoint, |
| 206 | max_phys_off_pwrlvl); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 207 | |
| 208 | exit: |
| 209 | /* |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 210 | * Release the locks corresponding to each power level in the |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 211 | * reverse order to which they were acquired. |
| 212 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 213 | psci_release_pwr_domain_locks(MPIDR_AFFLVL0, |
| 214 | end_pwrlvl, |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 215 | mpidr_nodes); |
| 216 | if (!skip_wfi) |
| 217 | psci_power_down_wfi(); |
| 218 | } |
| 219 | |
| 220 | /******************************************************************************* |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 221 | * The following functions finish an earlier suspend request. They |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 222 | * are called by the common finisher routine in psci_common.c. |
| 223 | ******************************************************************************/ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 224 | void psci_cpu_suspend_finish(pwr_map_node_t *node[], int pwrlvl) |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 225 | { |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 226 | int32_t suspend_level; |
| 227 | uint64_t counter_freq; |
| 228 | |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 229 | assert(node[pwrlvl]->level == pwrlvl); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 230 | |
| 231 | /* Ensure we have been woken up from a suspended state */ |
Soby Mathew | 6b8b302 | 2015-06-30 11:00:24 +0100 | [diff] [blame] | 232 | assert(psci_get_state(node[MPIDR_AFFLVL0]) == PSCI_STATE_SUSPEND); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 233 | |
| 234 | /* |
| 235 | * Plat. management: Perform the platform specific actions |
| 236 | * before we change the state of the cpu e.g. enabling the |
| 237 | * gic or zeroing the mailbox register. If anything goes |
| 238 | * wrong then assert as there is no way to recover from this |
| 239 | * situation. |
| 240 | */ |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 241 | psci_plat_pm_ops->pwr_domain_suspend_finish(pwrlvl); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 242 | |
| 243 | /* |
| 244 | * Arch. management: Enable the data cache, manage stack memory and |
| 245 | * restore the stashed EL3 architectural context from the 'cpu_context' |
| 246 | * structure for this cpu. |
| 247 | */ |
| 248 | psci_do_pwrup_cache_maintenance(); |
| 249 | |
| 250 | /* Re-init the cntfrq_el0 register */ |
| 251 | counter_freq = plat_get_syscnt_freq(); |
| 252 | write_cntfrq_el0(counter_freq); |
| 253 | |
| 254 | /* |
| 255 | * Call the cpu suspend finish handler registered by the Secure Payload |
| 256 | * Dispatcher to let it do any bookeeping. If the handler encounters an |
| 257 | * error, it's expected to assert within |
| 258 | */ |
| 259 | if (psci_spd_pm && psci_spd_pm->svc_suspend) { |
Soby Mathew | 3a9e8bf | 2015-05-05 16:33:16 +0100 | [diff] [blame] | 260 | suspend_level = psci_get_suspend_pwrlvl(); |
Soby Mathew | 991d42c | 2015-06-29 16:30:12 +0100 | [diff] [blame] | 261 | assert (suspend_level != PSCI_INVALID_DATA); |
| 262 | psci_spd_pm->svc_suspend_finish(suspend_level); |
| 263 | } |
| 264 | |
| 265 | /* Invalidate the suspend context for the node */ |
| 266 | psci_set_suspend_power_state(PSCI_INVALID_DATA); |
| 267 | |
| 268 | /* |
| 269 | * Generic management: Now we just need to retrieve the |
| 270 | * information that we had stashed away during the suspend |
| 271 | * call to set this cpu on its way. |
| 272 | */ |
| 273 | cm_prepare_el3_exit(NON_SECURE); |
| 274 | |
| 275 | /* Clean caches before re-entering normal world */ |
| 276 | dcsw_op_louis(DCCSW); |
| 277 | } |
| 278 | |