| Arvind Ram Prakash | 62d87e7 | 2024-06-06 11:33:37 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2024, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <arch_features.h> |
| 9 | #include <arch_helpers.h> |
| 10 | #include <lib/extensions/fgt2.h> |
| 11 | |
| 12 | void fgt2_enable(cpu_context_t *context) |
| 13 | { |
| 14 | u_register_t reg; |
| 15 | el3_state_t *state; |
| 16 | |
| 17 | state = get_el3state_ctx(context); |
| 18 | |
| 19 | /* Set the FGTEN2 bit in SCR_EL3 to enable access to HFGITR2_EL2, |
| 20 | * HFGRTR2_EL2, HFGWTR_EL2, HDFGRTR2_EL2, and HDFGWTR2_EL2. |
| 21 | */ |
| 22 | |
| 23 | reg = read_ctx_reg(state, CTX_SCR_EL3); |
| 24 | reg |= SCR_FGTEN2_BIT; |
| 25 | write_ctx_reg(state, CTX_SCR_EL3, reg); |
| 26 | } |
| 27 | |