blob: aeb778a1d9725f23efa37f228799a820d45140ce [file] [log] [blame]
developer5f735162021-01-04 00:02:34 +08001/*
2 * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef MT_SPM_RC_INTERNAL_H
8#define MT_SPM_RC_INTERNAL_H
9
10#include <stdbool.h>
11
12#define SPM_FLAG_SRAM_SLEEP_CTRL \
13 (SPM_FLAG_DISABLE_SSPM_SRAM_SLEEP | \
14 SPM_FLAG_DISABLE_DRAMC_MCU_SRAM_SLEEP | \
15 SPM_FLAG_DISABLE_SYSRAM_SLEEP | \
16 SPM_FLAG_DISABLE_MCUPM_SRAM_SLEEP | \
17 SPM_FLAG_DISABLE_SRAM_EVENT)
18
19/* cpu buck/ldo constraint function */
20bool spm_is_valid_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
21unsigned int spm_allow_rc_cpu_buck_ldo(int state_id);
22int spm_run_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
23int spm_reset_rc_cpu_buck_ldo(unsigned int cpu, int state_id);
24
25/* spm resource dram constraint function */
26bool spm_is_valid_rc_dram(unsigned int cpu, int state_id);
27int spm_update_rc_dram(int state_id, int type, const void *val);
28unsigned int spm_allow_rc_dram(int state_id);
29int spm_run_rc_dram(unsigned int cpu, int state_id);
30int spm_reset_rc_dram(unsigned int cpu, int state_id);
31
32/* spm resource syspll constraint function */
33bool spm_is_valid_rc_syspll(unsigned int cpu, int state_id);
34int spm_update_rc_syspll(int state_id, int type, const void *val);
35unsigned int spm_allow_rc_syspll(int state_id);
36int spm_run_rc_syspll(unsigned int cpu, int state_id);
37int spm_reset_rc_syspll(unsigned int cpu, int state_id);
38
39/* spm resource bus26m constraint function */
40bool spm_is_valid_rc_bus26m(unsigned int cpu, int state_id);
41int spm_update_rc_bus26m(int state_id, int type, const void *val);
42unsigned int spm_allow_rc_bus26m(int state_id);
43int spm_run_rc_bus26m(unsigned int cpu, int state_id);
44int spm_reset_rc_bus26m(unsigned int cpu, int state_id);
45#endif /* MT_SPM_RC_INTERNAL_H */