blob: 0b1543197f124efded8ac4f5a390499987472405 [file] [log] [blame]
developerbd481152020-11-02 10:45:34 +08001/*
2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef EMI_MPU_H
8#define EMI_MPU_H
9
10#include <platform_def.h>
11
12#define EMI_MPUP (EMI_BASE + 0x01D8)
13#define EMI_MPUQ (EMI_BASE + 0x01E0)
14#define EMI_MPUR (EMI_BASE + 0x01E8)
15#define EMI_MPUS (EMI_BASE + 0x01F0)
16#define EMI_MPUT (EMI_BASE + 0x01F8)
17#define EMI_MPUY (EMI_BASE + 0x0220)
18#define EMI_MPU_CTRL (EMI_MPU_BASE + 0x0000)
19#define EMI_MPUD0_ST (EMI_BASE + 0x0160)
20#define EMI_MPUD1_ST (EMI_BASE + 0x0164)
21#define EMI_MPUD2_ST (EMI_BASE + 0x0168)
22#define EMI_MPUD3_ST (EMI_BASE + 0x016C)
23#define EMI_MPUD0_ST2 (EMI_BASE + 0x0200)
24#define EMI_MPUD1_ST2 (EMI_BASE + 0x0204)
25#define EMI_MPUD2_ST2 (EMI_BASE + 0x0208)
26#define EMI_MPUD3_ST2 (EMI_BASE + 0x020C)
27
28#define EMI_PHY_OFFSET (0x40000000UL)
29
30#define NO_PROT (0)
31#define SEC_RW (1)
32#define SEC_RW_NSEC_R (2)
33#define SEC_RW_NSEC_W (3)
34#define SEC_R_NSEC_R (4)
35#define FORBIDDEN (5)
36#define SEC_R_NSEC_RW (6)
37
38#define SECURE_OS_MPU_REGION_ID (0)
39#define ATF_MPU_REGION_ID (1)
40
41#define EMI_MPU_SA0 (EMI_MPU_BASE + 0x100)
42#define EMI_MPU_EA0 (EMI_MPU_BASE + 0x200)
43#define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region) * 4)
44#define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region) * 4)
45
46#define EMI_MPU_APC0 (EMI_MPU_BASE + 0x300)
47#define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region) * 4 + \
48 (dgroup) * 0x100)
49
50#define EMI_MPU_CTRL_D0 (EMI_MPU_BASE + 0x800)
51#define EMI_MPU_CTRL_D(domain) (EMI_MPU_CTRL_D0 + domain * 4)
52#define EMI_RG_MASK_D0 (EMI_MPU_BASE + 0x900)
53#define EMI_RG_MASK_D(domain) (EMI_RG_MASK_D0 + domain * 4)
54
55#define EMI_MPU_DOMAIN_NUM 16
56#define EMI_MPU_REGION_NUM 32
57#define EMI_MPU_ALIGN_BITS 16
58#define DRAM_OFFSET (0x40000000 >> EMI_MPU_ALIGN_BITS)
59
60#define EMI_MPU_DGROUP_NUM (EMI_MPU_DOMAIN_NUM / 8)
61
62#if (EMI_MPU_DGROUP_NUM == 1)
63#define SET_ACCESS_PERMISSION(apc_ary, lock, d7, d6, d5, d4, d3, d2, d1, d0) \
64do { \
65 apc_ary[0] = 0; \
66 apc_ary[0] = \
67 (((unsigned int) d7) << 21) | (((unsigned int) d6) << 18) \
68 | (((unsigned int) d5) << 15) | (((unsigned int) d4) << 12) \
69 | (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) \
70 | (((unsigned int) d1) << 3) | ((unsigned int) d0) \
71 | (((unsigned int) lock) << 31); \
72} while (0)
73#elif (EMI_MPU_DGROUP_NUM == 2)
74#define SET_ACCESS_PERMISSION(apc_ary, lock, d15, d14, d13, d12, d11, d10, \
75 d9, d8, d7, d6, d5, d4, d3, d2, d1, d0) \
76do { \
77 apc_ary[1] = \
78 (((unsigned int) d15) << 21) | (((unsigned int) d14) << 18) \
79 | (((unsigned int) d13) << 15) | (((unsigned int) d12) << 12) \
80 | (((unsigned int) d11) << 9) | (((unsigned int) d10) << 6) \
81 | (((unsigned int) d9) << 3) | ((unsigned int) d8); \
82 apc_ary[0] = \
83 (((unsigned int) d7) << 21) | (((unsigned int) d6) << 18) \
84 | (((unsigned int) d5) << 15) | (((unsigned int) d4) << 12) \
85 | (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) \
86 | (((unsigned int) d1) << 3) | ((unsigned int) d0) \
87 | (((unsigned int) lock) << 31); \
88} while (0)
89#endif
90
91struct emi_region_info_t {
92 unsigned long long start;
93 unsigned long long end;
94 unsigned int region;
95 unsigned long apc[EMI_MPU_DGROUP_NUM];
96};
97
98void emi_mpu_init(void);
99int emi_mpu_set_protection(struct emi_region_info_t *region_info);
100void dump_emi_mpu_regions(void);
101
102#endif /* __EMI_MPU_H */