| Arunachalam Ganapathy | ade4a20 | 2020-09-22 12:50:45 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2020, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | /dts-v1/; |
| 7 | |
| 8 | / { |
| 9 | compatible = "arm,ffa-core-manifest-1.0"; |
| 10 | #address-cells = <2>; |
| 11 | #size-cells = <1>; |
| 12 | |
| 13 | attribute { |
| 14 | spmc_id = <0x8000>; |
| 15 | maj_ver = <0x1>; |
| 16 | min_ver = <0x0>; |
| 17 | exec_state = <0x0>; |
| 18 | load_address = <0x0 0xfd000000>; |
| 19 | entrypoint = <0x0 0xfd000000>; |
| 20 | binary_size = <0x80000>; |
| 21 | }; |
| 22 | |
| 23 | chosen { |
| 24 | linux,initrd-start = <0>; |
| 25 | linux,initrd-end = <0>; |
| 26 | }; |
| 27 | |
| 28 | hypervisor { |
| 29 | compatible = "hafnium,hafnium"; |
| 30 | vm1 { |
| 31 | is_ffa_partition; |
| 32 | debug_name = "cactus-primary"; |
| 33 | load_address = <0xfe000000>; |
| 34 | }; |
| 35 | vm2 { |
| 36 | is_ffa_partition; |
| 37 | debug_name = "cactus-secondary"; |
| 38 | load_address = <0xfe100000>; |
| 39 | vcpu_count = <4>; |
| 40 | mem_size = <1048576>; |
| 41 | }; |
| 42 | vm3 { |
| 43 | is_ffa_partition; |
| 44 | debug_name = "cactus-tertiary"; |
| 45 | load_address = <0xfe200000>; |
| 46 | vcpu_count = <4>; |
| 47 | mem_size = <1048576>; |
| 48 | }; |
| 49 | }; |
| 50 | |
| 51 | cpus { |
| 52 | #address-cells = <0x2>; |
| 53 | #size-cells = <0x0>; |
| 54 | |
| 55 | CPU0:cpu@0 { |
| 56 | device_type = "cpu"; |
| 57 | compatible = "arm,armv8"; |
| 58 | reg = <0x0 0x0>; |
| 59 | enable-method = "psci"; |
| 60 | }; |
| 61 | |
| 62 | /* |
| 63 | * SPM(Hafnium) requires secondary cpu nodes are declared in |
| 64 | * descending order |
| 65 | */ |
| 66 | CPU3:cpu@300 { |
| 67 | device_type = "cpu"; |
| 68 | compatible = "arm,armv8"; |
| 69 | reg = <0x0 0x300>; |
| 70 | enable-method = "psci"; |
| 71 | }; |
| 72 | |
| 73 | CPU2:cpu@200 { |
| 74 | device_type = "cpu"; |
| 75 | compatible = "arm,armv8"; |
| 76 | reg = <0x0 0x200>; |
| 77 | enable-method = "psci"; |
| 78 | }; |
| 79 | |
| 80 | CPU1:cpu@100 { |
| 81 | device_type = "cpu"; |
| 82 | compatible = "arm,armv8"; |
| 83 | reg = <0x0 0x100>; |
| 84 | enable-method = "psci"; |
| 85 | }; |
| 86 | }; |
| 87 | |
| 88 | /* 32MB of TC0_TZC_DRAM1_BASE */ |
| 89 | memory@fd000000 { |
| 90 | device_type = "memory"; |
| 91 | reg = <0x0 0xfd000000 0x2000000>; |
| 92 | }; |
| 93 | }; |