Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 1 | /* |
Jeenu Viswambharan | eeb43be | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <gicv2.h> |
| 8 | #include <plat_arm.h> |
| 9 | #include <platform.h> |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | /****************************************************************************** |
| 13 | * The following functions are defined as weak to allow a platform to override |
| 14 | * the way the GICv2 driver is initialised and used. |
| 15 | *****************************************************************************/ |
| 16 | #pragma weak plat_arm_gic_driver_init |
| 17 | #pragma weak plat_arm_gic_init |
| 18 | #pragma weak plat_arm_gic_cpuif_enable |
| 19 | #pragma weak plat_arm_gic_cpuif_disable |
| 20 | #pragma weak plat_arm_gic_pcpu_init |
| 21 | |
| 22 | /****************************************************************************** |
| 23 | * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 |
| 24 | * interrupts. |
| 25 | *****************************************************************************/ |
Jeenu Viswambharan | 723dce0 | 2017-09-22 08:59:59 +0100 | [diff] [blame] | 26 | static const interrupt_prop_t arm_interrupt_props[] = { |
| 27 | PLAT_ARM_G1S_IRQ_PROPS(GICV2_INTR_GROUP0), |
| 28 | PLAT_ARM_G0_IRQ_PROPS(GICV2_INTR_GROUP0) |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 29 | }; |
| 30 | |
Jeenu Viswambharan | eeb43be | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 31 | static unsigned int target_mask_array[PLATFORM_CORE_COUNT]; |
| 32 | |
Soby Mathew | cf022c5 | 2016-01-13 17:06:00 +0000 | [diff] [blame] | 33 | static const gicv2_driver_data_t arm_gic_data = { |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 34 | .gicd_base = PLAT_ARM_GICD_BASE, |
| 35 | .gicc_base = PLAT_ARM_GICC_BASE, |
Jeenu Viswambharan | 723dce0 | 2017-09-22 08:59:59 +0100 | [diff] [blame] | 36 | .interrupt_props = arm_interrupt_props, |
| 37 | .interrupt_props_num = ARRAY_SIZE(arm_interrupt_props), |
Jeenu Viswambharan | eeb43be | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 38 | .target_masks = target_mask_array, |
| 39 | .target_masks_num = ARRAY_SIZE(target_mask_array), |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | /****************************************************************************** |
| 43 | * ARM common helper to initialize the GICv2 only driver. |
| 44 | *****************************************************************************/ |
| 45 | void plat_arm_gic_driver_init(void) |
| 46 | { |
| 47 | gicv2_driver_init(&arm_gic_data); |
| 48 | } |
| 49 | |
| 50 | void plat_arm_gic_init(void) |
| 51 | { |
| 52 | gicv2_distif_init(); |
| 53 | gicv2_pcpu_distif_init(); |
| 54 | gicv2_cpuif_enable(); |
| 55 | } |
| 56 | |
| 57 | /****************************************************************************** |
| 58 | * ARM common helper to enable the GICv2 CPU interface |
| 59 | *****************************************************************************/ |
| 60 | void plat_arm_gic_cpuif_enable(void) |
| 61 | { |
| 62 | gicv2_cpuif_enable(); |
| 63 | } |
| 64 | |
| 65 | /****************************************************************************** |
| 66 | * ARM common helper to disable the GICv2 CPU interface |
| 67 | *****************************************************************************/ |
| 68 | void plat_arm_gic_cpuif_disable(void) |
| 69 | { |
| 70 | gicv2_cpuif_disable(); |
| 71 | } |
| 72 | |
| 73 | /****************************************************************************** |
| 74 | * ARM common helper to initialize the per cpu distributor interface in GICv2 |
| 75 | *****************************************************************************/ |
| 76 | void plat_arm_gic_pcpu_init(void) |
| 77 | { |
| 78 | gicv2_pcpu_distif_init(); |
Jeenu Viswambharan | eeb43be | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 79 | gicv2_set_pe_target_mask(plat_my_core_pos()); |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 80 | } |
Jeenu Viswambharan | 78132c9 | 2016-12-09 11:12:34 +0000 | [diff] [blame] | 81 | |
| 82 | /****************************************************************************** |
| 83 | * Stubs for Redistributor power management. Although GICv2 doesn't have |
| 84 | * Redistributor interface, these are provided for the sake of uniform GIC API |
| 85 | *****************************************************************************/ |
| 86 | void plat_arm_gic_redistif_on(void) |
| 87 | { |
| 88 | return; |
| 89 | } |
| 90 | |
| 91 | void plat_arm_gic_redistif_off(void) |
| 92 | { |
| 93 | return; |
| 94 | } |