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Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +09001/*
Yann Gautier8b61d882024-02-05 11:28:29 +01002 * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +09003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Soby Mathew2f38ce32018-02-08 17:45:12 +00007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
9#include <arch_helpers.h>
10#include <common/bl_common.h>
11#include <common/debug.h>
Raymond Maoab98f152024-11-14 13:28:36 -080012#include <lib/transfer_list.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013#include <lib/xlat_tables/xlat_tables_compat.h>
14#include <plat/common/platform.h>
Manish V Badarkhe80f13ee2020-07-23 20:23:01 +010015#include <services/arm_arch_svc.h>
Manish V Badarkhef809c6e2020-02-22 08:43:00 +000016#include <smccc_helpers.h>
Sumit Garg617e2152019-11-15 15:34:55 +053017#include <tools_share/firmware_encrypted.h>
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +090018
19/*
Soby Mathew2f38ce32018-02-08 17:45:12 +000020 * The following platform functions are weakly defined. The Platforms
21 * may redefine with strong definition.
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +090022 */
Soby Mathew2f38ce32018-02-08 17:45:12 +000023#pragma weak bl2_el3_plat_prepare_exit
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +090024#pragma weak plat_error_handler
25#pragma weak bl2_plat_preload_setup
Masahiro Yamada02a0d3d2018-02-01 16:45:51 +090026#pragma weak bl2_plat_handle_pre_image_load
27#pragma weak bl2_plat_handle_post_image_load
Sumit Garg617e2152019-11-15 15:34:55 +053028#pragma weak plat_get_enc_key_info
Manish V Badarkhe80f13ee2020-07-23 20:23:01 +010029#pragma weak plat_is_smccc_feature_available
Manish V Badarkhef809c6e2020-02-22 08:43:00 +000030#pragma weak plat_get_soc_version
31#pragma weak plat_get_soc_revision
32
33int32_t plat_get_soc_version(void)
34{
35 return SMC_ARCH_CALL_NOT_SUPPORTED;
36}
37
38int32_t plat_get_soc_revision(void)
39{
40 return SMC_ARCH_CALL_NOT_SUPPORTED;
41}
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +090042
Manish V Badarkhe80f13ee2020-07-23 20:23:01 +010043int32_t plat_is_smccc_feature_available(u_register_t fid __unused)
44{
45 return SMC_ARCH_CALL_NOT_SUPPORTED;
46}
47
Soby Mathew2f38ce32018-02-08 17:45:12 +000048void bl2_el3_plat_prepare_exit(void)
Masahiro Yamada43d20b32018-02-01 16:46:18 +090049{
Masahiro Yamada43d20b32018-02-01 16:46:18 +090050}
51
Soby Mathew2f38ce32018-02-08 17:45:12 +000052void __dead2 plat_error_handler(int err)
Masahiro Yamada43d20b32018-02-01 16:46:18 +090053{
Soby Mathew2f38ce32018-02-08 17:45:12 +000054 while (1)
55 wfi();
Masahiro Yamada43d20b32018-02-01 16:46:18 +090056}
57
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +090058void bl2_plat_preload_setup(void)
59{
60}
61
Masahiro Yamada02a0d3d2018-02-01 16:45:51 +090062int bl2_plat_handle_pre_image_load(unsigned int image_id)
63{
64 return 0;
65}
66
67int bl2_plat_handle_post_image_load(unsigned int image_id)
68{
69 return 0;
70}
71
Roberto Vargas344ff022018-10-19 16:44:18 +010072/*
Sumit Garg617e2152019-11-15 15:34:55 +053073 * Weak implementation to provide dummy decryption key only for test purposes,
74 * platforms must override this API for any real world firmware encryption
75 * use-case.
76 */
77int plat_get_enc_key_info(enum fw_enc_status_t fw_enc_status, uint8_t *key,
78 size_t *key_len, unsigned int *flags,
79 const uint8_t *img_id, size_t img_id_len)
80{
81#define DUMMY_FIP_ENC_KEY { 0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef, \
82 0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef, \
83 0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef, \
84 0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef }
85
86 const uint8_t dummy_key[] = DUMMY_FIP_ENC_KEY;
87
88 assert(*key_len >= sizeof(dummy_key));
89
90 *key_len = sizeof(dummy_key);
91 memcpy(key, dummy_key, *key_len);
92 *flags = 0;
93
94 return 0;
95}
96
97/*
Roberto Vargas344ff022018-10-19 16:44:18 +010098 * Set up the page tables for the generic and platform-specific memory regions.
99 * The size of the Trusted SRAM seen by the BL image must be specified as well
100 * as an array specifying the generic memory regions which can be;
101 * - Code section;
102 * - Read-only data section;
103 * - Init code section, if applicable
104 * - Coherent memory region, if applicable.
105 */
106
107void __init setup_page_tables(const mmap_region_t *bl_regions,
108 const mmap_region_t *plat_regions)
109{
110#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
111 const mmap_region_t *regions = bl_regions;
112
113 while (regions->size != 0U) {
114 VERBOSE("Region: 0x%lx - 0x%lx has attributes 0x%x\n",
115 regions->base_va,
116 regions->base_va + regions->size,
117 regions->attr);
118 regions++;
119 }
120#endif
121 /*
122 * Map the Trusted SRAM with appropriate memory attributes.
123 * Subsequent mappings will adjust the attributes for specific regions.
124 */
125 mmap_add(bl_regions);
126
127 /* Now (re-)map the platform-specific memory regions */
128 mmap_add(plat_regions);
129
130 /* Create the page tables to reflect the above mappings */
131 init_xlat_tables();
132}
Raymond Maoab98f152024-11-14 13:28:36 -0800133
134#if ((MEASURED_BOOT || DICE_PROTECTION_ENVIRONMENT) && TRANSFER_LIST)
135int plat_handoff_mboot(const void *data, uint32_t data_size, void *tl_base)
136{
137 if (!transfer_list_add(tl_base, TL_TAG_TPM_EVLOG, data_size, data))
138 return -1;
139
140 return 0;
141}
142#endif