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Soby Mathew3b5156e2017-10-05 12:27:33 +01001/*
Roberto Vargasd93fde32018-04-11 11:53:31 +01002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Soby Mathew3b5156e2017-10-05 12:27:33 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
Daniel Boulbyb1b058d2018-09-18 11:52:49 +01006#ifndef ARM_TZC_DRAM_LD_S__
7#define ARM_TZC_DRAM_LD_S__
Soby Mathew3b5156e2017-10-05 12:27:33 +01008
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +00009#include <xlat_tables_defs.h>
10
Soby Mathew3b5156e2017-10-05 12:27:33 +010011MEMORY {
12 EL3_SEC_DRAM (rw): ORIGIN = ARM_EL3_TZC_DRAM1_BASE, LENGTH = ARM_EL3_TZC_DRAM1_SIZE
13}
14
15SECTIONS
16{
17 . = ARM_EL3_TZC_DRAM1_BASE;
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000018 ASSERT(. == ALIGN(PAGE_SIZE),
Soby Mathew3b5156e2017-10-05 12:27:33 +010019 "ARM_EL3_TZC_DRAM_BASE address is not aligned on a page boundary.")
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000020 el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) {
Soby Mathew3b5156e2017-10-05 12:27:33 +010021 __EL3_SEC_DRAM_START__ = .;
22 *(arm_el3_tzc_dram)
23 __EL3_SEC_DRAM_UNALIGNED_END__ = .;
24
Roberto Vargasd93fde32018-04-11 11:53:31 +010025 . = ALIGN(PAGE_SIZE);
Soby Mathew3b5156e2017-10-05 12:27:33 +010026 __EL3_SEC_DRAM_END__ = .;
27 } >EL3_SEC_DRAM
28}
29
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010030#endif /* ARM_TZC_DRAM_LD_S__ */