blob: 1a1229aabffefd68eecf36ffa5f936843317c492 [file] [log] [blame]
Ying-Chun Liu (PaulLiu)26ca4f52019-02-12 18:33:04 +08001/*
2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
Ying-Chun Liu (PaulLiu)26ca4f52019-02-12 18:33:04 +08009#include <console_macros.S>
10#include <assert_macros.S>
11#include "imx_uart.h"
12
13 .globl console_imx_uart_register
14 .globl console_imx_uart_putc
15 .globl console_imx_uart_getc
16 .globl console_imx_uart_flush
17
18func console_imx_uart_register
19 push {r4, lr}
20 mov r4, r3
21 cmp r4, #0
22 beq register_fail
Andre Przywaraab269202020-03-05 13:56:56 +000023 str r0, [r4, #CONSOLE_T_BASE]
Ying-Chun Liu (PaulLiu)26ca4f52019-02-12 18:33:04 +080024
25 bl console_imx_uart_core_init
26 cmp r0, #0
27 bne register_fail
28
29 mov r0, r4
30 pop {r4, lr}
31 finish_console_register imx_uart putc=1, getc=1, flush=1
32
33register_fail:
34 pop {r4, pc}
35endfunc console_imx_uart_register
36
37func console_imx_uart_putc
Andre Przywaraab269202020-03-05 13:56:56 +000038 ldr r1, [r1, #CONSOLE_T_BASE]
Ying-Chun Liu (PaulLiu)26ca4f52019-02-12 18:33:04 +080039 b console_imx_uart_core_putc
40endfunc console_imx_uart_putc
41
42func console_imx_uart_getc
Andre Przywaraab269202020-03-05 13:56:56 +000043 ldr r0, [r0, #CONSOLE_T_BASE]
Ying-Chun Liu (PaulLiu)26ca4f52019-02-12 18:33:04 +080044 b console_imx_uart_core_getc
45endfunc console_imx_uart_getc
46
47func console_imx_uart_flush
Andre Przywaraab269202020-03-05 13:56:56 +000048 ldr r0, [r0, #CONSOLE_T_BASE]
Ying-Chun Liu (PaulLiu)26ca4f52019-02-12 18:33:04 +080049 b console_imx_uart_core_flush
50endfunc console_imx_uart_flush