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Aditya Angadi0c324b42020-11-17 21:17:58 +05301/*
Rohit Mathewa0dd3072024-02-03 17:22:54 +00002 * Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved.
Aditya Angadi0c324b42020-11-17 21:17:58 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Rohit Mathewa0dd3072024-02-03 17:22:54 +00007#ifndef NRD_SOC_PLATFORM_DEF_V2_H
8#define NRD_SOC_PLATFORM_DEF_V2_H
Aditya Angadi0c324b42020-11-17 21:17:58 +05309
Rohit Mathewa0dd3072024-02-03 17:22:54 +000010#include <nrd_base_platform_def.h>
11#include <nrd_soc_css_def_v2.h>
Aditya Angadi0c324b42020-11-17 21:17:58 +053012
Thomas Abrahame4030c02021-02-15 14:14:59 +053013/* Map the System registers to access from S-EL0 */
14#define CSS_SYSTEMREG_DEVICE_BASE (0x0C010000)
15#define CSS_SYSTEMREG_DEVICE_SIZE (0x00010000)
16#define PLAT_ARM_SECURE_MAP_SYSTEMREG MAP_REGION_FLAT( \
17 CSS_SYSTEMREG_DEVICE_BASE, \
18 CSS_SYSTEMREG_DEVICE_SIZE, \
19 (MT_DEVICE | MT_RW | \
20 MT_SECURE | MT_USER))
21
22/* Map the NOR2 Flash to access from S-EL0 */
23#define CSS_NOR2_FLASH_DEVICE_BASE (0x001054000000)
24#define CSS_NOR2_FLASH_DEVICE_SIZE (0x000004000000)
25#define PLAT_ARM_SECURE_MAP_NOR2 MAP_REGION_FLAT( \
26 CSS_NOR2_FLASH_DEVICE_BASE, \
27 CSS_NOR2_FLASH_DEVICE_SIZE, \
28 (MT_DEVICE | MT_RW | \
29 MT_SECURE | MT_USER))
30
Rohit Mathewa0dd3072024-02-03 17:22:54 +000031#endif /* NRD_SOC_PLATFORM_DEF_V2_H */