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Jens Wiklanderc2888862014-08-04 15:39:58 +02001/*
Douglas Raillarda8954fc2017-01-26 15:54:44 +00002 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
Jens Wiklanderc2888862014-08-04 15:39:58 +02003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <assert.h>
33#include <bl_common.h>
34#include <context_mgmt.h>
35#include <string.h>
Douglas Raillarda8954fc2017-01-26 15:54:44 +000036#include <utils.h>
Jens Wiklanderc2888862014-08-04 15:39:58 +020037#include "opteed_private.h"
38
39/*******************************************************************************
40 * Given a OPTEE entrypoint info pointer, entry point PC, register width,
41 * cpu id & pointer to a context data structure, this function will
42 * initialize OPTEE context and entry point info for OPTEE.
43 ******************************************************************************/
44void opteed_init_optee_ep_state(struct entry_point_info *optee_entry_point,
45 uint32_t rw, uint64_t pc,
46 optee_context_t *optee_ctx)
47{
48 uint32_t ep_attr;
49
50 /* Passing a NULL context is a critical programming error */
51 assert(optee_ctx);
52 assert(optee_entry_point);
53 assert(pc);
54
55 /* Associate this context with the cpu specified */
56 optee_ctx->mpidr = read_mpidr_el1();
57 optee_ctx->state = 0;
58 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_OFF);
59
60 cm_set_context(&optee_ctx->cpu_ctx, SECURE);
61
62 /* initialise an entrypoint to set up the CPU context */
63 ep_attr = SECURE | EP_ST_ENABLE;
64 if (read_sctlr_el3() & SCTLR_EE_BIT)
65 ep_attr |= EP_EE_BIG;
66 SET_PARAM_HEAD(optee_entry_point, PARAM_EP, VERSION_1, ep_attr);
67 optee_entry_point->pc = pc;
68 if (rw == OPTEE_AARCH64)
69 optee_entry_point->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
70 DISABLE_ALL_EXCEPTIONS);
71 else
72 optee_entry_point->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
73 SPSR_E_LITTLE,
74 DAIF_FIQ_BIT |
75 DAIF_IRQ_BIT |
76 DAIF_ABT_BIT);
Douglas Raillarda8954fc2017-01-26 15:54:44 +000077 zeromem(&optee_entry_point->args, sizeof(optee_entry_point->args));
Jens Wiklanderc2888862014-08-04 15:39:58 +020078}
79
80/*******************************************************************************
81 * This function takes an OPTEE context pointer and:
82 * 1. Applies the S-EL1 system register context from optee_ctx->cpu_ctx.
83 * 2. Saves the current C runtime state (callee saved registers) on the stack
84 * frame and saves a reference to this state.
85 * 3. Calls el3_exit() so that the EL3 system and general purpose registers
86 * from the optee_ctx->cpu_ctx are used to enter the OPTEE image.
87 ******************************************************************************/
88uint64_t opteed_synchronous_sp_entry(optee_context_t *optee_ctx)
89{
90 uint64_t rc;
91
92 assert(optee_ctx != NULL);
93 assert(optee_ctx->c_rt_ctx == 0);
94
95 /* Apply the Secure EL1 system register context and switch to it */
96 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx);
97 cm_el1_sysregs_context_restore(SECURE);
98 cm_set_next_eret_context(SECURE);
99
100 rc = opteed_enter_sp(&optee_ctx->c_rt_ctx);
101#if DEBUG
102 optee_ctx->c_rt_ctx = 0;
103#endif
104
105 return rc;
106}
107
108
109/*******************************************************************************
110 * This function takes an OPTEE context pointer and:
111 * 1. Saves the S-EL1 system register context tp optee_ctx->cpu_ctx.
112 * 2. Restores the current C runtime state (callee saved registers) from the
113 * stack frame using the reference to this state saved in opteed_enter_sp().
114 * 3. It does not need to save any general purpose or EL3 system register state
115 * as the generic smc entry routine should have saved those.
116 ******************************************************************************/
117void opteed_synchronous_sp_exit(optee_context_t *optee_ctx, uint64_t ret)
118{
119 assert(optee_ctx != NULL);
120 /* Save the Secure EL1 system register context */
121 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx);
122 cm_el1_sysregs_context_save(SECURE);
123
124 assert(optee_ctx->c_rt_ctx != 0);
125 opteed_exit_sp(optee_ctx->c_rt_ctx, ret);
126
127 /* Should never reach here */
128 assert(0);
129}