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Harry Liebelafd1ec72014-04-01 19:19:22 +01001/*
Roberto Vargas1a6eed32018-02-12 12:36:17 +00002 * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
Harry Liebelafd1ec72014-04-01 19:19:22 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Harry Liebelafd1ec72014-04-01 19:19:22 +01005 */
6
7#ifndef __TZC400_H__
8#define __TZC400_H__
9
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000010#include <tzc_common.h>
Harry Liebelafd1ec72014-04-01 19:19:22 +010011
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000012#define BUILD_CONFIG_OFF 0x000
13#define GATE_KEEPER_OFF 0x008
14#define SPECULATION_CTRL_OFF 0x00c
15#define INT_STATUS 0x010
16#define INT_CLEAR 0x014
Harry Liebelafd1ec72014-04-01 19:19:22 +010017
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000018#define FAIL_ADDRESS_LOW_OFF 0x020
19#define FAIL_ADDRESS_HIGH_OFF 0x024
20#define FAIL_CONTROL_OFF 0x028
21#define FAIL_ID 0x02c
Harry Liebelafd1ec72014-04-01 19:19:22 +010022
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000023/* ID registers not common across different varieties of TZC */
24#define PID5 0xFD4
25#define PID6 0xFD8
26#define PID7 0xFDC
Harry Liebelafd1ec72014-04-01 19:19:22 +010027
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000028#define BUILD_CONFIG_NF_SHIFT 24
29#define BUILD_CONFIG_NF_MASK 0x3
30#define BUILD_CONFIG_AW_SHIFT 8
31#define BUILD_CONFIG_AW_MASK 0x3f
32#define BUILD_CONFIG_NR_SHIFT 0
33#define BUILD_CONFIG_NR_MASK 0x1f
Harry Liebelafd1ec72014-04-01 19:19:22 +010034
35/*
36 * Number of gate keepers is implementation defined. But we know the max for
37 * this device is 4. Get implementation details from BUILD_CONFIG.
38 */
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000039#define GATE_KEEPER_OS_SHIFT 16
40#define GATE_KEEPER_OS_MASK 0xf
41#define GATE_KEEPER_OR_SHIFT 0
42#define GATE_KEEPER_OR_MASK 0xf
43#define GATE_KEEPER_FILTER_MASK 0x1
Harry Liebelafd1ec72014-04-01 19:19:22 +010044
45/* Speculation is enabled by default. */
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000046#define SPECULATION_CTRL_WRITE_DISABLE (1 << 1)
47#define SPECULATION_CTRL_READ_DISABLE (1 << 0)
Harry Liebelafd1ec72014-04-01 19:19:22 +010048
49/* Max number of filters allowed is 4. */
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000050#define INT_STATUS_OVERLAP_SHIFT 16
51#define INT_STATUS_OVERLAP_MASK 0xf
52#define INT_STATUS_OVERRUN_SHIFT 8
53#define INT_STATUS_OVERRUN_MASK 0xf
54#define INT_STATUS_STATUS_SHIFT 0
55#define INT_STATUS_STATUS_MASK 0xf
Harry Liebelafd1ec72014-04-01 19:19:22 +010056
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000057#define INT_CLEAR_CLEAR_SHIFT 0
58#define INT_CLEAR_CLEAR_MASK 0xf
Harry Liebelafd1ec72014-04-01 19:19:22 +010059
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000060#define FAIL_CONTROL_DIR_SHIFT (1 << 24)
61#define FAIL_CONTROL_DIR_READ 0x0
62#define FAIL_CONTROL_DIR_WRITE 0x1
63#define FAIL_CONTROL_NS_SHIFT (1 << 21)
64#define FAIL_CONTROL_NS_SECURE 0x0
65#define FAIL_CONTROL_NS_NONSECURE 0x1
66#define FAIL_CONTROL_PRIV_SHIFT (1 << 20)
67#define FAIL_CONTROL_PRIV_PRIV 0x0
68#define FAIL_CONTROL_PRIV_UNPRIV 0x1
Harry Liebelafd1ec72014-04-01 19:19:22 +010069
70/*
71 * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.
72 * Platform should provide the value on initialisation.
73 */
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000074#define FAIL_ID_VNET_SHIFT 24
75#define FAIL_ID_VNET_MASK 0xf
76#define FAIL_ID_ID_SHIFT 0
Harry Liebelafd1ec72014-04-01 19:19:22 +010077
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000078#define TZC_400_PERIPHERAL_ID 0x460
Harry Liebelafd1ec72014-04-01 19:19:22 +010079
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000080/* Filter enable bits in a TZC */
81#define TZC_400_REGION_ATTR_F_EN_MASK 0xf
82#define TZC_400_REGION_ATTR_FILTER_BIT(x) ((1 << x) \
83 << TZC_REGION_ATTR_F_EN_SHIFT)
84#define TZC_400_REGION_ATTR_FILTER_BIT_ALL \
85 (TZC_400_REGION_ATTR_F_EN_MASK << \
86 TZC_REGION_ATTR_F_EN_SHIFT)
Harry Liebelafd1ec72014-04-01 19:19:22 +010087
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000088/*
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000089 * All TZC region configuration registers are placed one after another. It
90 * depicts size of block of registers for programming each region.
91 */
92#define TZC_400_REGION_SIZE 0x20
93#define TZC_400_ACTION_OFF 0x4
Dan Handley76076762015-03-19 19:26:52 +000094
95#ifndef __ASSEMBLY__
96
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +000097#include <cdefs.h>
Dan Handley76076762015-03-19 19:26:52 +000098#include <stdint.h>
99
Harry Liebelafd1ec72014-04-01 19:19:22 +0100100/*******************************************************************************
101 * Function & variable prototypes
102 ******************************************************************************/
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000103void tzc400_init(uintptr_t base);
104void tzc400_configure_region0(tzc_region_attributes_t sec_attr,
105 unsigned int ns_device_access);
106void tzc400_configure_region(unsigned int filters,
107 int region,
Yatharth Kocharfc719752016-04-08 14:40:44 +0100108 unsigned long long region_base,
109 unsigned long long region_top,
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000110 tzc_region_attributes_t sec_attr,
Roberto Vargas1a6eed32018-02-12 12:36:17 +0000111 unsigned int nsaid_permissions);
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000112void tzc400_set_action(tzc_action_t action);
113void tzc400_enable_filters(void);
114void tzc400_disable_filters(void);
Harry Liebelafd1ec72014-04-01 19:19:22 +0100115
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000116static inline void tzc_init(uintptr_t base)
117{
118 tzc400_init(base);
119}
Harry Liebelafd1ec72014-04-01 19:19:22 +0100120
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000121static inline void tzc_configure_region0(
Dan Handley53c843a2014-08-04 19:53:05 +0100122 tzc_region_attributes_t sec_attr,
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000123 unsigned int ns_device_access)
124{
125 tzc400_configure_region0(sec_attr, ns_device_access);
126}
127
128static inline void tzc_configure_region(
129 unsigned int filters,
130 int region,
Yatharth Kocharfc719752016-04-08 14:40:44 +0100131 unsigned long long region_base,
132 unsigned long long region_top,
Vikram Kanigiri1eabdbc2016-01-28 17:22:16 +0000133 tzc_region_attributes_t sec_attr,
134 unsigned int ns_device_access)
135{
136 tzc400_configure_region(filters, region, region_base,
137 region_top, sec_attr, ns_device_access);
138}
139
140static inline void tzc_set_action(tzc_action_t action)
141{
142 tzc400_set_action(action);
143}
144
145
146static inline void tzc_enable_filters(void)
147{
148 tzc400_enable_filters();
149}
150
151static inline void tzc_disable_filters(void)
152{
153 tzc400_disable_filters();
154}
Harry Liebelafd1ec72014-04-01 19:19:22 +0100155
Dan Handley76076762015-03-19 19:26:52 +0000156#endif /* __ASSEMBLY__ */
Harry Liebelafd1ec72014-04-01 19:19:22 +0100157
158#endif /* __TZC400__ */