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Yatharth Kochar241ec6c2016-05-09 18:26:35 +01001/*
Deepika Bhavnani4287c0c2019-12-13 10:23:18 -06002 * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
Yatharth Kochar241ec6c2016-05-09 18:26:35 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Yatharth Kochar241ec6c2016-05-09 18:26:35 +01005 */
6
7#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Yatharth Kochar241ec6c2016-05-09 18:26:35 +01009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/debug.h>
12#include <plat/common/platform.h>
13
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010014#include "psci_private.h"
15
16#ifndef PLAT_MAX_PWR_LVL_STATES
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010017#define PLAT_MAX_PWR_LVL_STATES 2U
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010018#endif
19
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010020/* Following structure is used for PSCI STAT */
21typedef struct psci_stat {
22 u_register_t residency;
23 u_register_t count;
24} psci_stat_t;
25
26/*
27 * Following is used to keep track of the last cpu
28 * that goes to power down in non cpu power domains.
29 */
Jonathan Wright21b3b052018-03-20 14:34:01 +000030static int last_cpu_in_non_cpu_pd[PSCI_NUM_NON_CPU_PWR_DOMAINS] = {
Deepika Bhavnani4287c0c2019-12-13 10:23:18 -060031 [0 ... PSCI_NUM_NON_CPU_PWR_DOMAINS - 1U] = -1};
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010032
33/*
34 * Following are used to store PSCI STAT values for
35 * CPU and non CPU power domains.
36 */
37static psci_stat_t psci_cpu_stat[PLATFORM_CORE_COUNT]
38 [PLAT_MAX_PWR_LVL_STATES];
39static psci_stat_t psci_non_cpu_stat[PSCI_NUM_NON_CPU_PWR_DOMAINS]
40 [PLAT_MAX_PWR_LVL_STATES];
41
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010042/*
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010043 * This functions returns the index into the `psci_stat_t` array given the
44 * local power state and power domain level. If the platform implements the
45 * `get_pwr_lvl_state_idx` pm hook, then that will be used to return the index.
46 */
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010047static int get_stat_idx(plat_local_state_t local_state, unsigned int pwr_lvl)
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010048{
49 int idx;
50
51 if (psci_plat_pm_ops->get_pwr_lvl_state_idx == NULL) {
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010052 assert(PLAT_MAX_PWR_LVL_STATES == 2U);
53 if (is_local_state_retn(local_state) != 0)
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010054 return 0;
55
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010056 assert(is_local_state_off(local_state) != 0);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010057 return 1;
58 }
59
60 idx = psci_plat_pm_ops->get_pwr_lvl_state_idx(local_state, pwr_lvl);
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010061 assert((idx >= 0) && (idx < (int) PLAT_MAX_PWR_LVL_STATES));
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010062 return idx;
63}
64
65/*******************************************************************************
66 * This function is passed the target local power states for each power
67 * domain (state_info) between the current CPU domain and its ancestors until
68 * the target power level (end_pwrlvl).
69 *
70 * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', it
71 * updates the `last_cpu_in_non_cpu_pd[]` with last power down cpu id.
72 *
73 * This function will only be invoked with data cache enabled and while
74 * powering down a core.
75 ******************************************************************************/
76void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
77 const psci_power_state_t *state_info)
78{
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010079 unsigned int lvl, parent_idx;
Deepika Bhavnani4287c0c2019-12-13 10:23:18 -060080 unsigned int cpu_idx = plat_my_core_pos();
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010081
82 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010083 assert(state_info != NULL);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010084
85 parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node;
86
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010087 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010088
89 /* Break early if the target power state is RUN */
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +010090 if (is_local_state_run(state_info->pwr_domain_state[lvl]) != 0)
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010091 break;
92
93 /*
94 * The power domain is entering a low power state, so this is
95 * the last CPU for this power domain
96 */
Deepika Bhavnani4287c0c2019-12-13 10:23:18 -060097 last_cpu_in_non_cpu_pd[parent_idx] = (int)cpu_idx;
Yatharth Kochar241ec6c2016-05-09 18:26:35 +010098
99 parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node;
100 }
101
102}
103
104/*******************************************************************************
105 * This function updates the PSCI STATS(residency time and count) for CPU
106 * and NON-CPU power domains.
107 * It is called with caches enabled and locks acquired(for NON-CPU domain)
108 ******************************************************************************/
109void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
dp-arm66abfbe2017-01-31 13:01:04 +0000110 const psci_power_state_t *state_info)
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100111{
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100112 unsigned int lvl, parent_idx;
Deepika Bhavnani4287c0c2019-12-13 10:23:18 -0600113 unsigned int cpu_idx = plat_my_core_pos();
Etienne Carriered171bfc2017-06-22 22:10:32 +0200114 int stat_idx;
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100115 plat_local_state_t local_state;
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100116 u_register_t residency;
117
118 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100119 assert(state_info != NULL);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100120
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100121 /* Get the index into the stats array */
122 local_state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
123 stat_idx = get_stat_idx(local_state, PSCI_CPU_PWR_LVL);
124
dp-arm66abfbe2017-01-31 13:01:04 +0000125 /* Call into platform interface to calculate residency. */
126 residency = plat_psci_stat_get_residency(PSCI_CPU_PWR_LVL,
127 state_info, cpu_idx);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100128
129 /* Update CPU stats. */
130 psci_cpu_stat[cpu_idx][stat_idx].residency += residency;
131 psci_cpu_stat[cpu_idx][stat_idx].count++;
132
133 /*
134 * Check what power domains above CPU were off
135 * prior to this CPU powering on.
136 */
137 parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node;
Jonathan Wright21b3b052018-03-20 14:34:01 +0000138 /* Return early if this is the first power up. */
139 if (last_cpu_in_non_cpu_pd[parent_idx] == -1)
140 return;
141
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100142 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) {
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100143 local_state = state_info->pwr_domain_state[lvl];
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100144 if (is_local_state_run(local_state) != 0) {
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100145 /* Break early */
146 break;
147 }
148
149 assert(last_cpu_in_non_cpu_pd[parent_idx] != -1);
150
dp-arm66abfbe2017-01-31 13:01:04 +0000151 /* Call into platform interface to calculate residency. */
152 residency = plat_psci_stat_get_residency(lvl, state_info,
Deepika Bhavnani4287c0c2019-12-13 10:23:18 -0600153 (unsigned int)last_cpu_in_non_cpu_pd[parent_idx]);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100154
155 /* Initialize back to reset value */
156 last_cpu_in_non_cpu_pd[parent_idx] = -1;
157
158 /* Get the index into the stats array */
159 stat_idx = get_stat_idx(local_state, lvl);
160
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100161 /* Update non cpu stats */
162 psci_non_cpu_stat[parent_idx][stat_idx].residency += residency;
163 psci_non_cpu_stat[parent_idx][stat_idx].count++;
164
165 parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node;
166 }
167
168}
169
170/*******************************************************************************
171 * This function returns the appropriate count and residency time of the
172 * local state for the highest power level expressed in the `power_state`
173 * for the node represented by `target_cpu`.
174 ******************************************************************************/
Etienne Carriered171bfc2017-06-22 22:10:32 +0200175static int psci_get_stat(u_register_t target_cpu, unsigned int power_state,
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100176 psci_stat_t *psci_stat)
177{
Etienne Carriered171bfc2017-06-22 22:10:32 +0200178 int rc;
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100179 unsigned int pwrlvl, lvl, parent_idx, target_idx;
180 int stat_idx;
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100181 psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
182 plat_local_state_t local_state;
183
184 /* Validate the target_cpu parameter and determine the cpu index */
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100185 target_idx = (unsigned int) plat_core_pos_by_mpidr(target_cpu);
186 if (target_idx == (unsigned int) -1)
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100187 return PSCI_E_INVALID_PARAMS;
188
189 /* Validate the power_state parameter */
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100190 if (psci_plat_pm_ops->translate_power_state_by_mpidr == NULL)
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100191 rc = psci_validate_power_state(power_state, &state_info);
192 else
193 rc = psci_plat_pm_ops->translate_power_state_by_mpidr(
194 target_cpu, power_state, &state_info);
195
196 if (rc != PSCI_E_SUCCESS)
197 return PSCI_E_INVALID_PARAMS;
198
199 /* Find the highest power level */
200 pwrlvl = psci_find_target_suspend_lvl(&state_info);
Sandrine Bailleuxf9f3bbf2016-06-22 16:35:01 +0100201 if (pwrlvl == PSCI_INVALID_PWR_LVL) {
202 ERROR("Invalid target power level for PSCI statistics operation\n");
203 panic();
204 }
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100205
206 /* Get the index into the stats array */
207 local_state = state_info.pwr_domain_state[pwrlvl];
208 stat_idx = get_stat_idx(local_state, pwrlvl);
209
210 if (pwrlvl > PSCI_CPU_PWR_LVL) {
211 /* Get the power domain index */
Joel Huttond5227592018-10-09 14:08:42 +0100212 parent_idx = SPECULATION_SAFE_VALUE(psci_cpu_pd_nodes[target_idx].parent_node);
Antonio Nino Diaz0f5dc9f2018-07-18 16:21:11 +0100213 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl < pwrlvl; lvl++)
Joel Huttond5227592018-10-09 14:08:42 +0100214 parent_idx = SPECULATION_SAFE_VALUE(psci_non_cpu_pd_nodes[parent_idx].parent_node);
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100215
216 /* Get the non cpu power domain stats */
217 *psci_stat = psci_non_cpu_stat[parent_idx][stat_idx];
218 } else {
219 /* Get the cpu power domain stats */
220 *psci_stat = psci_cpu_stat[target_idx][stat_idx];
221 }
222
223 return PSCI_E_SUCCESS;
224}
225
226/* This is the top level function for PSCI_STAT_RESIDENCY SMC. */
227u_register_t psci_stat_residency(u_register_t target_cpu,
228 unsigned int power_state)
229{
230 psci_stat_t psci_stat;
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100231 int rc = psci_get_stat(target_cpu, power_state, &psci_stat);
Etienne Carriered171bfc2017-06-22 22:10:32 +0200232
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100233 if (rc == PSCI_E_SUCCESS)
234 return psci_stat.residency;
235 else
236 return 0;
237}
238
239/* This is the top level function for PSCI_STAT_COUNT SMC. */
240u_register_t psci_stat_count(u_register_t target_cpu,
241 unsigned int power_state)
242{
243 psci_stat_t psci_stat;
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100244 int rc = psci_get_stat(target_cpu, power_state, &psci_stat);
Etienne Carriered171bfc2017-06-22 22:10:32 +0200245
Yatharth Kochar241ec6c2016-05-09 18:26:35 +0100246 if (rc == PSCI_E_SUCCESS)
247 return psci_stat.count;
248 else
249 return 0;
250}