blob: 8480c08fea6f446c815b7df740155b3bf2ac16c8 [file] [log] [blame]
Chandni Cherukurif7813232018-09-16 21:06:29 +05301/*
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +05302 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Chandni Cherukurif7813232018-09-16 21:06:29 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef PLATFORM_DEF_H
8#define PLATFORM_DEF_H
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <lib/utils_def.h>
11
Chandni Cherukurif7813232018-09-16 21:06:29 +053012#include <sgi_base_platform_def.h>
13
14#define PLAT_ARM_CLUSTER_COUNT 2
15#define CSS_SGI_MAX_CPUS_PER_CLUSTER 4
16#define CSS_SGI_MAX_PE_PER_CPU 1
17
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +053018#define PLAT_CSS_MHU_BASE UL(0x45400000)
Masahisa Kojima0d316882019-03-07 11:23:42 +090019#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +053020
21/* Base address of DMC-620 instances */
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +053022#define RDN1EDGE_DMC620_BASE0 UL(0x4e000000)
23#define RDN1EDGE_DMC620_BASE1 UL(0x4e100000)
Chandni Cherukurif7813232018-09-16 21:06:29 +053024
Chandni Cherukuri0fdcbc02018-10-16 15:19:54 +053025/* System power domain level */
26#define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2
27
Chandni Cherukuri504c05d2018-10-16 14:11:34 +053028#define PLAT_MAX_PWR_LVL ARM_PWR_LVL1
29
Chandni Cherukurif7813232018-09-16 21:06:29 +053030#endif /* PLATFORM_DEF_H */