Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 1 | /* |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 2 | * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved. |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 7 | #include <assert.h> |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 8 | #include <cdefs.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 9 | #include <stdbool.h> |
| 10 | |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 11 | #include <arch.h> |
| 12 | #include <arch_helpers.h> |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 13 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 14 | #include <lib/el3_runtime/pubsub_events.h> |
| 15 | #include <lib/extensions/amu.h> |
| 16 | #include <lib/extensions/amu_private.h> |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 17 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 18 | #include <plat/common/platform.h> |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 19 | |
| 20 | static struct amu_ctx amu_ctxs[PLATFORM_CORE_COUNT]; |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 21 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 22 | static inline __unused uint32_t read_id_pfr0_amu(void) |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 23 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 24 | return (read_id_pfr0() >> ID_PFR0_AMU_SHIFT) & |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 25 | ID_PFR0_AMU_MASK; |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 26 | } |
| 27 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 28 | static inline __unused void write_hcptr_tam(uint32_t value) |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 29 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 30 | write_hcptr((read_hcptr() & ~TAM_BIT) | |
| 31 | ((value << TAM_SHIFT) & TAM_BIT)); |
| 32 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 33 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 34 | static inline __unused void write_amcr_cg1rz(uint32_t value) |
| 35 | { |
| 36 | write_amcr((read_amcr() & ~AMCR_CG1RZ_BIT) | |
| 37 | ((value << AMCR_CG1RZ_SHIFT) & AMCR_CG1RZ_BIT)); |
| 38 | } |
| 39 | |
| 40 | static inline __unused uint32_t read_amcfgr_ncg(void) |
| 41 | { |
| 42 | return (read_amcfgr() >> AMCFGR_NCG_SHIFT) & |
| 43 | AMCFGR_NCG_MASK; |
| 44 | } |
| 45 | |
| 46 | static inline __unused uint32_t read_amcgcr_cg1nc(void) |
| 47 | { |
| 48 | return (read_amcgcr() >> AMCGCR_CG1NC_SHIFT) & |
| 49 | AMCGCR_CG1NC_MASK; |
| 50 | } |
| 51 | |
| 52 | static inline __unused uint32_t read_amcntenset0_px(void) |
| 53 | { |
| 54 | return (read_amcntenset0() >> AMCNTENSET0_Pn_SHIFT) & |
| 55 | AMCNTENSET0_Pn_MASK; |
| 56 | } |
| 57 | |
| 58 | static inline __unused uint32_t read_amcntenset1_px(void) |
| 59 | { |
| 60 | return (read_amcntenset1() >> AMCNTENSET1_Pn_SHIFT) & |
| 61 | AMCNTENSET1_Pn_MASK; |
| 62 | } |
| 63 | |
| 64 | static inline __unused void write_amcntenset0_px(uint32_t px) |
| 65 | { |
| 66 | uint32_t value = read_amcntenset0(); |
| 67 | |
| 68 | value &= ~AMCNTENSET0_Pn_MASK; |
| 69 | value |= (px << AMCNTENSET0_Pn_SHIFT) & |
| 70 | AMCNTENSET0_Pn_MASK; |
| 71 | |
| 72 | write_amcntenset0(value); |
| 73 | } |
| 74 | |
| 75 | static inline __unused void write_amcntenset1_px(uint32_t px) |
| 76 | { |
| 77 | uint32_t value = read_amcntenset1(); |
| 78 | |
| 79 | value &= ~AMCNTENSET1_Pn_MASK; |
| 80 | value |= (px << AMCNTENSET1_Pn_SHIFT) & |
| 81 | AMCNTENSET1_Pn_MASK; |
| 82 | |
| 83 | write_amcntenset1(value); |
| 84 | } |
| 85 | |
| 86 | static inline __unused void write_amcntenclr0_px(uint32_t px) |
| 87 | { |
| 88 | uint32_t value = read_amcntenclr0(); |
| 89 | |
| 90 | value &= ~AMCNTENCLR0_Pn_MASK; |
| 91 | value |= (px << AMCNTENCLR0_Pn_SHIFT) & AMCNTENCLR0_Pn_MASK; |
| 92 | |
| 93 | write_amcntenclr0(value); |
| 94 | } |
| 95 | |
| 96 | static inline __unused void write_amcntenclr1_px(uint32_t px) |
| 97 | { |
| 98 | uint32_t value = read_amcntenclr1(); |
| 99 | |
| 100 | value &= ~AMCNTENCLR1_Pn_MASK; |
| 101 | value |= (px << AMCNTENCLR1_Pn_SHIFT) & AMCNTENCLR1_Pn_MASK; |
| 102 | |
| 103 | write_amcntenclr1(value); |
| 104 | } |
| 105 | |
| 106 | static bool amu_supported(void) |
| 107 | { |
| 108 | return read_id_pfr0_amu() >= ID_PFR0_AMU_V1; |
| 109 | } |
| 110 | |
| 111 | static bool amu_v1p1_supported(void) |
| 112 | { |
| 113 | return read_id_pfr0_amu() >= ID_PFR0_AMU_V1P1; |
| 114 | } |
| 115 | |
| 116 | #if ENABLE_AMU_AUXILIARY_COUNTERS |
| 117 | static bool amu_group1_supported(void) |
| 118 | { |
| 119 | return read_amcfgr_ncg() > 0U; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 120 | } |
| 121 | #endif |
| 122 | |
| 123 | /* |
| 124 | * Enable counters. This function is meant to be invoked |
| 125 | * by the context management library before exiting from EL3. |
| 126 | */ |
Antonio Nino Diaz | 033b4bb | 2018-10-25 16:52:26 +0100 | [diff] [blame] | 127 | void amu_enable(bool el2_unused) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 128 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 129 | if (!amu_supported()) { |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 130 | return; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 131 | } |
| 132 | |
| 133 | #if AMU_GROUP1_NR_COUNTERS |
| 134 | /* Check and set presence of group 1 counters */ |
| 135 | if (!amu_group1_supported()) { |
| 136 | ERROR("AMU Counter Group 1 is not implemented\n"); |
| 137 | panic(); |
| 138 | } |
| 139 | |
| 140 | /* Check number of group 1 counters */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 141 | uint32_t cnt_num = read_amcgcr_cg1nc(); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 142 | VERBOSE("%s%u. %s%u\n", |
| 143 | "Number of AMU Group 1 Counters ", cnt_num, |
| 144 | "Requested number ", AMU_GROUP1_NR_COUNTERS); |
| 145 | |
| 146 | if (cnt_num < AMU_GROUP1_NR_COUNTERS) { |
| 147 | ERROR("%s%u is less than %s%u\n", |
| 148 | "Number of AMU Group 1 Counters ", cnt_num, |
| 149 | "Requested number ", AMU_GROUP1_NR_COUNTERS); |
| 150 | panic(); |
| 151 | } |
| 152 | #endif |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 153 | |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 154 | if (el2_unused) { |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 155 | /* |
| 156 | * Non-secure access from EL0 or EL1 to the Activity Monitor |
| 157 | * registers do not trap to EL2. |
| 158 | */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 159 | write_hcptr_tam(0U); |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 160 | } |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 161 | |
| 162 | /* Enable group 0 counters */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 163 | write_amcntenset0_px(AMU_GROUP0_COUNTERS_MASK); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 164 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 165 | #if AMU_GROUP1_NR_COUNTERS |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 166 | /* Enable group 1 counters */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 167 | write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 168 | #endif |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 169 | |
| 170 | /* Initialize FEAT_AMUv1p1 features if present. */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 171 | if (!amu_v1p1_supported()) { |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 172 | return; |
| 173 | } |
| 174 | |
| 175 | #if AMU_RESTRICT_COUNTERS |
| 176 | /* |
| 177 | * FEAT_AMUv1p1 adds a register field to restrict access to group 1 |
| 178 | * counters at all but the highest implemented EL. This is controlled |
| 179 | * with the AMU_RESTRICT_COUNTERS compile time flag, when set, system |
| 180 | * register reads at lower ELs return zero. Reads from the memory |
| 181 | * mapped view are unaffected. |
| 182 | */ |
| 183 | VERBOSE("AMU group 1 counter access restricted.\n"); |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 184 | write_amcr_cg1rz(1U); |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 185 | #else |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 186 | write_amcr_cg1rz(0U); |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 187 | #endif |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 188 | } |
| 189 | |
| 190 | /* Read the group 0 counter identified by the given `idx`. */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 191 | static uint64_t amu_group0_cnt_read(unsigned int idx) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 192 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 193 | assert(amu_supported()); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 194 | assert(idx < AMU_GROUP0_NR_COUNTERS); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 195 | |
| 196 | return amu_group0_cnt_read_internal(idx); |
| 197 | } |
| 198 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 199 | /* Write the group 0 counter identified by the given `idx` with `val` */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 200 | static void amu_group0_cnt_write(unsigned int idx, uint64_t val) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 201 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 202 | assert(amu_supported()); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 203 | assert(idx < AMU_GROUP0_NR_COUNTERS); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 204 | |
| 205 | amu_group0_cnt_write_internal(idx, val); |
| 206 | isb(); |
| 207 | } |
| 208 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 209 | #if AMU_GROUP1_NR_COUNTERS |
| 210 | /* Read the group 1 counter identified by the given `idx` */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 211 | static uint64_t amu_group1_cnt_read(unsigned int idx) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 212 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 213 | assert(amu_supported()); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 214 | assert(amu_group1_supported()); |
| 215 | assert(idx < AMU_GROUP1_NR_COUNTERS); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 216 | |
| 217 | return amu_group1_cnt_read_internal(idx); |
| 218 | } |
| 219 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 220 | /* Write the group 1 counter identified by the given `idx` with `val` */ |
Chris Kay | f13c6b5 | 2021-05-24 21:00:07 +0100 | [diff] [blame] | 221 | static void amu_group1_cnt_write(unsigned int idx, uint64_t val) |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 222 | { |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 223 | assert(amu_supported()); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 224 | assert(amu_group1_supported()); |
| 225 | assert(idx < AMU_GROUP1_NR_COUNTERS); |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 226 | |
| 227 | amu_group1_cnt_write_internal(idx, val); |
| 228 | isb(); |
| 229 | } |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 230 | #endif /* AMU_GROUP1_NR_COUNTERS */ |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 231 | |
| 232 | static void *amu_context_save(const void *arg) |
| 233 | { |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 234 | struct amu_ctx *ctx = &amu_ctxs[plat_my_core_pos()]; |
| 235 | unsigned int i; |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 236 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 237 | if (!amu_supported()) { |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 238 | return (void *)-1; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 239 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 240 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 241 | #if AMU_GROUP1_NR_COUNTERS |
| 242 | if (!amu_group1_supported()) { |
| 243 | return (void *)-1; |
| 244 | } |
| 245 | #endif |
| 246 | /* Assert that group 0/1 counter configuration is what we expect */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 247 | assert(read_amcntenset0_px() == AMU_GROUP0_COUNTERS_MASK); |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 248 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 249 | #if AMU_GROUP1_NR_COUNTERS |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 250 | assert(read_amcntenset1_px() == AMU_GROUP1_COUNTERS_MASK); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 251 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 252 | /* |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 253 | * Disable group 0/1 counters to avoid other observers like SCP sampling |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 254 | * counter values from the future via the memory mapped view. |
| 255 | */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 256 | write_amcntenclr0_px(AMU_GROUP0_COUNTERS_MASK); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 257 | |
| 258 | #if AMU_GROUP1_NR_COUNTERS |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 259 | write_amcntenclr1_px(AMU_GROUP1_COUNTERS_MASK); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 260 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 261 | isb(); |
| 262 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 263 | /* Save all group 0 counters */ |
| 264 | for (i = 0U; i < AMU_GROUP0_NR_COUNTERS; i++) { |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 265 | ctx->group0_cnts[i] = amu_group0_cnt_read(i); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 266 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 267 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 268 | #if AMU_GROUP1_NR_COUNTERS |
| 269 | /* Save group 1 counters */ |
| 270 | for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) { |
| 271 | if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) { |
| 272 | ctx->group1_cnts[i] = amu_group1_cnt_read(i); |
| 273 | } |
| 274 | } |
| 275 | #endif |
Antonio Nino Diaz | 033b4bb | 2018-10-25 16:52:26 +0100 | [diff] [blame] | 276 | return (void *)0; |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | static void *amu_context_restore(const void *arg) |
| 280 | { |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 281 | struct amu_ctx *ctx = &amu_ctxs[plat_my_core_pos()]; |
| 282 | unsigned int i; |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 283 | |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 284 | if (!amu_supported()) { |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 285 | return (void *)-1; |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 286 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 287 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 288 | #if AMU_GROUP1_NR_COUNTERS |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 289 | if (amu_group1_supported()) { |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 290 | return (void *)-1; |
| 291 | } |
| 292 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 293 | /* Counters were disabled in `amu_context_save()` */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 294 | assert(read_amcntenset0_px() == 0U); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 295 | |
| 296 | #if AMU_GROUP1_NR_COUNTERS |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 297 | assert(read_amcntenset1_px() == 0U); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 298 | #endif |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 299 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 300 | /* Restore all group 0 counters */ |
| 301 | for (i = 0U; i < AMU_GROUP0_NR_COUNTERS; i++) { |
Joel Hutton | 0dcdd8d | 2017-12-21 15:21:20 +0000 | [diff] [blame] | 302 | amu_group0_cnt_write(i, ctx->group0_cnts[i]); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 303 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 304 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 305 | /* Restore group 0 counter configuration */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 306 | write_amcntenset0_px(AMU_GROUP0_COUNTERS_MASK); |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 307 | |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 308 | #if AMU_GROUP1_NR_COUNTERS |
| 309 | /* Restore group 1 counters */ |
| 310 | for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) { |
| 311 | if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) { |
| 312 | amu_group1_cnt_write(i, ctx->group1_cnts[i]); |
| 313 | } |
| 314 | } |
| 315 | |
| 316 | /* Restore group 1 counter configuration */ |
Chris Kay | a5fde28 | 2021-05-26 11:58:23 +0100 | [diff] [blame^] | 317 | write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK); |
Alexei Fedorov | 7e6306b | 2020-07-14 08:17:56 +0100 | [diff] [blame] | 318 | #endif |
| 319 | |
Antonio Nino Diaz | 033b4bb | 2018-10-25 16:52:26 +0100 | [diff] [blame] | 320 | return (void *)0; |
Dimitris Papastamos | dda48b0 | 2017-10-17 14:03:14 +0100 | [diff] [blame] | 321 | } |
Dimitris Papastamos | eaf3e6d | 2017-11-28 13:47:06 +0000 | [diff] [blame] | 322 | |
| 323 | SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_start, amu_context_save); |
| 324 | SUBSCRIBE_TO_EVENT(psci_suspend_pwrdown_finish, amu_context_restore); |