blob: d3bef82f9472f4e4c087a9645b6dfd95092f31ac [file] [log] [blame]
Soby Mathew7b754182016-07-11 14:15:27 +01001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <plat_arm.h>
32#include "../fvp_private.h"
33
34void sp_min_early_platform_setup(void)
35{
36 arm_sp_min_early_platform_setup();
37
38 /* Initialize the platform config for future decision making */
39 fvp_config_setup();
40
41 /*
42 * Initialize the correct interconnect for this cluster during cold
43 * boot. No need for locks as no other CPU is active.
44 */
45 fvp_interconnect_init();
46
47 /*
48 * Enable coherency in interconnect for the primary CPU's cluster.
49 * Earlier bootloader stages might already do this (e.g. Trusted
50 * Firmware's BL1 does it) but we can't assume so. There is no harm in
51 * executing this code twice anyway.
52 * FVP PSCI code will enable coherency for other clusters.
53 */
54 fvp_interconnect_enable();
55}