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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Soby Mathew47e43f22016-02-01 14:04:34 +00002 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2b6b5742015-03-19 19:17:53 +000031#include <arch.h>
Soby Mathew47e43f22016-02-01 14:04:34 +000032#include <cassert.h>
Soby Mathewfec4eb72015-07-01 16:16:20 +010033#include <plat_arm.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010034#include <platform_def.h>
Dan Handley4d2e49d2014-04-11 11:52:12 +010035#include "drivers/pwrc/fvp_pwrc.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
Soby Mathewfec4eb72015-07-01 16:16:20 +010037/* The FVP power domain tree descriptor */
Soby Mathew47e43f22016-02-01 14:04:34 +000038unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 1];
39
40
41CASSERT(FVP_CLUSTER_COUNT && FVP_CLUSTER_COUNT <= 256, assert_invalid_fvp_cluster_count);
42
43/*******************************************************************************
44 * This function dynamically constructs the topology according to
45 * FVP_CLUSTER_COUNT and returns it.
46 ******************************************************************************/
47const unsigned char *plat_get_power_domain_tree_desc(void)
48{
49 int i;
50
51 /*
52 * The FVP power domain tree does not have a single system level power domain
53 * i.e. a single root node. The first entry in the power domain descriptor
54 * specifies the number of power domains at the highest power level. For the FVP
55 * this is the number of cluster power domains.
56 */
57 fvp_power_domain_tree_desc[0] = FVP_CLUSTER_COUNT;
58
59 for (i = 0; i < FVP_CLUSTER_COUNT; i++)
60 fvp_power_domain_tree_desc[i + 1] = FVP_MAX_CPUS_PER_CLUSTER;
61
62 return fvp_power_domain_tree_desc;
63}
64
65/*******************************************************************************
66 * This function returns the core count within the cluster corresponding to
67 * `mpidr`.
68 ******************************************************************************/
69unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
70{
71 return FVP_MAX_CPUS_PER_CLUSTER;
72}
Achin Gupta4f6ad662013-10-25 09:08:21 +010073
74/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010075 * This function implements a part of the critical interface between the psci
Soby Mathewfec4eb72015-07-01 16:16:20 +010076 * generic layer and the platform that allows the former to query the platform
77 * to convert an MPIDR to a unique linear index. An error code (-1) is returned
78 * in case the MPIDR is invalid.
Achin Gupta4f6ad662013-10-25 09:08:21 +010079 ******************************************************************************/
Soby Mathewfec4eb72015-07-01 16:16:20 +010080int plat_core_pos_by_mpidr(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010081{
Soby Mathewfec4eb72015-07-01 16:16:20 +010082 if (arm_check_mpidr(mpidr) == -1)
83 return -1;
Achin Gupta4f6ad662013-10-25 09:08:21 +010084
Soby Mathewfec4eb72015-07-01 16:16:20 +010085 if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID)
86 return -1;
Achin Gupta4f6ad662013-10-25 09:08:21 +010087
Soby Mathewfec4eb72015-07-01 16:16:20 +010088 return plat_arm_calc_core_pos(mpidr);
Achin Gupta4f6ad662013-10-25 09:08:21 +010089}