Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / a5a8baeddb16f2ef3270711b69cef8e6bf25e41c / . / plat / arm / board / rdn1edge / platform.mk
blob: ca1e95eaf08b3202c6de5bad62b975c847255a52 [file] [log] [blame]
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]1#
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]2# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include plat/arm/css/sgi/sgi-common.mk
8
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]9RDN1EDGE_BASE = plat/arm/board/rdn1edge
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]10
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]11PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]12
John Tsichritzis56369c12019-02-19 13:49:06 +0000[diff] [blame]13SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]14
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100[diff] [blame]15BL1_SOURCES += ${SGI_CPU_SOURCES} \
16 ${RDN1EDGE_BASE}/rdn1edge_err.c
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]17
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]18BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
19 ${RDN1EDGE_BASE}/rdn1edge_security.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100[diff] [blame]20 ${RDN1EDGE_BASE}/rdn1edge_err.c \
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +0530[diff] [blame]21 drivers/arm/tzc/tzc_dmc620.c \
22 lib/utils/mem_region.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]23 plat/arm/common/arm_nor_psci_mem_protect.c
24
25BL31_SOURCES += ${SGI_CPU_SOURCES} \
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]26 ${RDN1EDGE_BASE}/rdn1edge_plat.c \
Vijayenthiran Subramaniamf5cb00f2019-12-27 19:27:57 +0530[diff] [blame]27 ${RDN1EDGE_BASE}/rdn1edge_topology.c \
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]28 drivers/cfi/v2m/v2m_flash.c \
29 lib/utils/mem_region.c \
30 plat/arm/common/arm_nor_psci_mem_protect.c
31
32# Add the FDT_SOURCES and options for Dynamic Config
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]33FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_tb_fw_config.dts
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]34TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
35
36# Add the TB_FW_CONFIG to FIP and specify the same to certtool
37$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
38
Chandni Cherukuri15ec1e52019-02-22 13:41:03 +0530[diff] [blame]39FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
Chandni Cherukuri29ea98d2018-11-28 11:26:19 +0530[diff] [blame]40NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]41
Chandni Cherukuri29ea98d2018-11-28 11:26:19 +0530[diff] [blame]42# Add the NT_FW_CONFIG to FIP and specify the same to certtool
43$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
Chandni Cherukurif7813232018-09-16 21:06:29 +0530[diff] [blame]44
45override CTX_INCLUDE_AARCH32_REGS := 0