| Achin Gupta | 07f4e07 | 2014-02-02 12:02:23 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 30 | |
| 31 | #include <arch.h> |
| 32 | #include <context.h> |
| 33 | |
| 34 | |
| Achin Gupta | 07f4e07 | 2014-02-02 12:02:23 +0000 | [diff] [blame] | 35 | /* --------------------------------------------- |
| 36 | * Zero out the callee saved register to prevent |
| 37 | * leakage of secure state into the normal world |
| 38 | * during the first ERET after a cold/warm boot. |
| 39 | * --------------------------------------------- |
| 40 | */ |
| 41 | .macro zero_callee_saved_regs |
| 42 | mov x19, xzr |
| 43 | mov x20, xzr |
| 44 | mov x21, xzr |
| 45 | mov x22, xzr |
| 46 | mov x23, xzr |
| 47 | mov x24, xzr |
| 48 | mov x25, xzr |
| 49 | mov x26, xzr |
| 50 | mov x27, xzr |
| 51 | mov x28, xzr |
| 52 | mov x29, xzr |
| 53 | .endm |
| 54 | |
| 55 | .macro switch_to_exception_stack reg1 reg2 |
| 56 | mov \reg1 , sp |
| 57 | ldr \reg2, [\reg1, #CTX_EL3STATE_OFFSET + CTX_EXCEPTION_SP] |
| 58 | mov sp, \reg2 |
| 59 | .endm |
| 60 | |
| 61 | /* ----------------------------------------------------- |
| 62 | * Handle SMC exceptions seperately from other sync. |
| 63 | * exceptions. |
| 64 | * ----------------------------------------------------- |
| 65 | */ |
| 66 | .macro handle_sync_exception |
| 67 | stp x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] |
| 68 | mrs x30, esr_el3 |
| 69 | ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH |
| 70 | |
| 71 | cmp x30, #EC_AARCH32_SMC |
| 72 | b.eq smc_handler32 |
| 73 | |
| 74 | cmp x30, #EC_AARCH64_SMC |
| 75 | b.eq smc_handler64 |
| 76 | |
| 77 | /* ----------------------------------------------------- |
| 78 | * The following code handles any synchronous exception |
| 79 | * that is not an SMC. SP_EL3 is pointing to a context |
| 80 | * structure where all the scratch registers are saved. |
| 81 | * An exception stack is also retrieved from the context |
| 82 | * Currently, a register dump is printed since BL31 does |
| 83 | * not expect any such exceptions. |
| 84 | * ----------------------------------------------------- |
| 85 | */ |
| 86 | bl save_scratch_registers |
| 87 | switch_to_exception_stack x0 x1 |
| 88 | |
| 89 | /* Save the core_context pointer for handled faults */ |
| 90 | stp x0, xzr, [sp, #-0x10]! |
| 91 | bl fault_handler |
| 92 | ldp x0, xzr, [sp], #0x10 |
| 93 | |
| 94 | mov sp, x0 |
| 95 | bl restore_scratch_registers |
| 96 | ldp x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] |
| 97 | eret |
| 98 | .endm |
| 99 | |
| 100 | /* ----------------------------------------------------- |
| 101 | * Use a platform defined mechanism to report an async. |
| 102 | * exception. |
| 103 | * ----------------------------------------------------- |
| 104 | */ |
| 105 | .macro handle_async_exception type |
| 106 | stp x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] |
| 107 | bl save_scratch_registers |
| 108 | switch_to_exception_stack x0 x1 |
| 109 | |
| 110 | /* Save the core_context pointer */ |
| 111 | stp x0, xzr, [sp, #-0x10]! |
| 112 | mov x0, \type |
| 113 | bl plat_report_exception |
| 114 | ldp x0, xzr, [sp], #0x10 |
| 115 | |
| 116 | mov sp, x0 |
| 117 | bl restore_scratch_registers |
| 118 | ldp x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] |
| 119 | .endm |
| 120 | |