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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Joel Hutton5cc3bc82018-03-21 11:40:57 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6#ifndef __COMMON_DEF_H__
7#define __COMMON_DEF_H__
8
Yatharth Kochara65be2f2015-10-09 18:06:13 +01009#include <bl_common.h>
10#include <platform_def.h>
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010011#include <xlat_tables_defs.h>
Yatharth Kochara65be2f2015-10-09 18:06:13 +010012
Dan Handley9df48042015-03-19 18:58:55 +000013/******************************************************************************
14 * Required platform porting definitions that are expected to be common to
15 * all platforms
16 *****************************************************************************/
17
18/*
19 * Platform binary types for linking
20 */
Yatharth Kocharf528faf2016-06-28 16:58:26 +010021#ifdef AARCH32
22#define PLATFORM_LINKER_FORMAT "elf32-littlearm"
23#define PLATFORM_LINKER_ARCH arm
24#else
Dan Handley9df48042015-03-19 18:58:55 +000025#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
26#define PLATFORM_LINKER_ARCH aarch64
Yatharth Kocharf528faf2016-06-28 16:58:26 +010027#endif /* AARCH32 */
Dan Handley9df48042015-03-19 18:58:55 +000028
29/*
30 * Generic platform constants
31 */
32#define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n"
33
Yatharth Kochara65be2f2015-10-09 18:06:13 +010034#define BL2_IMAGE_DESC { \
35 .image_id = BL2_IMAGE_ID, \
Yatharth Kocharf11b29a2016-02-01 11:04:46 +000036 SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, \
Yatharth Kochar51f76f62016-09-12 16:10:33 +010037 VERSION_2, image_info_t, 0), \
38 .image_info.image_base = BL2_BASE, \
39 .image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
40 SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, \
41 VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
42 .ep_info.pc = BL2_BASE, \
43}
Yatharth Kochara65be2f2015-10-09 18:06:13 +010044
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010045/*
46 * The following constants identify the extents of the code & read-only data
47 * regions. These addresses are used by the MMU setup code and therefore they
48 * must be page-aligned.
49 *
50 * When the code and read-only data are mapped as a single atomic section
51 * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
52 * code by specifying the read-only data section as empty.
53 *
54 * BL1 is different than the other images in the sense that its read-write data
55 * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
56 * run-time. Therefore, the read-write data in ROM can be mapped with the same
57 * memory attributes as the read-only data region. For this reason, BL1 uses
58 * different macros.
59 *
60 * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
61 * just points to the end of BL1's actual content in Trusted ROM. Therefore it
62 * needs to be rounded up to the next page size in order to map the whole last
63 * page of it with the right memory attributes.
64 */
65#if SEPARATE_CODE_AND_RODATA
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010066
Masahiro Yamada51bef612017-01-18 02:10:08 +090067#define BL1_CODE_END BL_CODE_END
Joel Hutton5cc3bc82018-03-21 11:40:57 +000068#define BL1_RO_DATA_BASE BL_RO_DATA_BASE
Masahiro Yamada51bef612017-01-18 02:10:08 +090069#define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
Jiafei Pan43a7bf42018-03-21 07:20:09 +000070#if BL2_IN_XIP_MEM
71#define BL2_CODE_END BL_CODE_END
72#define BL2_RO_DATA_BASE BL_RO_DATA_BASE
73#define BL2_RO_DATA_END round_up(BL2_ROM_END, PAGE_SIZE)
74#endif /* BL2_IN_XIP_MEM */
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010075#else
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010076#define BL_RO_DATA_BASE 0
Masahiro Yamada51bef612017-01-18 02:10:08 +090077#define BL_RO_DATA_END 0
Masahiro Yamada51bef612017-01-18 02:10:08 +090078#define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
Jiafei Pan43a7bf42018-03-21 07:20:09 +000079#if BL2_IN_XIP_MEM
80#define BL2_RO_DATA_BASE 0
81#define BL2_RO_DATA_END 0
82#define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE)
83#endif /* BL2_IN_XIP_MEM */
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010084#endif /* SEPARATE_CODE_AND_RODATA */
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +010085#endif /* __COMMON_DEF_H__ */