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Yann Gautier41934662018-07-20 11:36:05 +02001/*
Yann Gautiera2e2a302019-02-14 11:13:39 +01002 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
Yann Gautier41934662018-07-20 11:36:05 +02003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Yann Gautier41934662018-07-20 11:36:05 +02007#include <errno.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Yann Gautier41934662018-07-20 11:36:05 +02009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <drivers/st/stm32mp1_clk.h>
12#include <dt-bindings/clock/stm32mp1-clks.h>
13#include <lib/mmio.h>
14
Yann Gautier41934662018-07-20 11:36:05 +020015#include <stm32mp1_context.h>
16
17#define TAMP_BOOT_ITF_BACKUP_REG_ID U(20)
18#define TAMP_BOOT_ITF_MASK U(0x0000FF00)
19#define TAMP_BOOT_ITF_SHIFT 8
20
21int stm32_save_boot_interface(uint32_t interface, uint32_t instance)
22{
23 uint32_t tamp_clk_off = 0;
24 uint32_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_ITF_BACKUP_REG_ID);
25
Yann Gautiera2e2a302019-02-14 11:13:39 +010026 if (!stm32mp_clk_is_enabled(RTCAPB)) {
Yann Gautier41934662018-07-20 11:36:05 +020027 tamp_clk_off = 1;
Yann Gautiera2e2a302019-02-14 11:13:39 +010028 if (stm32mp_clk_enable(RTCAPB) != 0) {
Yann Gautier41934662018-07-20 11:36:05 +020029 return -EINVAL;
30 }
31 }
32
33 mmio_clrsetbits_32(bkpr_itf_idx,
34 TAMP_BOOT_ITF_MASK,
35 ((interface << 4) | (instance & 0xFU)) <<
36 TAMP_BOOT_ITF_SHIFT);
37
38 if (tamp_clk_off != 0U) {
Yann Gautiera2e2a302019-02-14 11:13:39 +010039 if (stm32mp_clk_disable(RTCAPB) != 0) {
Yann Gautier41934662018-07-20 11:36:05 +020040 return -EINVAL;
41 }
42 }
43
44 return 0;
45}