| developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
| developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <mcucfg.h> |
| 9 | #include <mmio.h> |
| 10 | |
| 11 | void disable_scu(unsigned long mpidr) |
| 12 | { |
| 13 | if (mpidr & MPIDR_CLUSTER_MASK) |
| 14 | mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg, |
| 15 | MP1_ACINACTM); |
| 16 | else |
| 17 | mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config, |
| 18 | MP0_ACINACTM); |
| 19 | } |
| 20 | |
| 21 | void enable_scu(unsigned long mpidr) |
| 22 | { |
| 23 | if (mpidr & MPIDR_CLUSTER_MASK) |
| 24 | mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg, |
| 25 | MP1_ACINACTM); |
| 26 | else |
| 27 | mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config, |
| 28 | MP0_ACINACTM); |
| 29 | } |