| Saurabh Gorecha | 70389ca | 2020-04-22 21:31:24 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef QTISECLIB_INTERFACE_H |
| 8 | #define QTISECLIB_INTERFACE_H |
| 9 | |
| 10 | #include <stdbool.h> |
| 11 | #include <stdint.h> |
| 12 | |
| 13 | #include <qtiseclib_defs.h> |
| 14 | |
| 15 | typedef struct memprot_ipa_info_s { |
| 16 | uint64_t mem_addr; |
| 17 | uint64_t mem_size; |
| 18 | } memprot_info_t; |
| 19 | |
| 20 | typedef struct memprot_dst_vm_perm_info_s { |
| 21 | uint32_t dst_vm; |
| 22 | uint32_t dst_vm_perm; |
| 23 | uint64_t ctx; |
| 24 | uint32_t ctx_size; |
| 25 | } memprot_dst_vm_perm_info_t; |
| 26 | |
| 27 | /* |
| 28 | * QTISECLIB Published API's. |
| 29 | */ |
| 30 | |
| 31 | /* |
| 32 | * Assembly API's |
| 33 | */ |
| 34 | |
| 35 | /* |
| 36 | * CPUSS common reset handler for all CPU wake up (both cold & warm boot). |
| 37 | * Executes on all core. This API assume serialization across CPU |
| 38 | * already taken care before invoking. |
| 39 | * |
| 40 | * Clobbers: x0 - x17, x30 |
| 41 | */ |
| 42 | void qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state); |
| 43 | |
| 44 | /* |
| 45 | * Execute CPU (Kryo4 gold) specific reset handler / system initialization. |
| 46 | * This takes care of executing required CPU errata's. |
| 47 | * |
| 48 | * Clobbers: x0 - x16 |
| 49 | */ |
| 50 | void qtiseclib_kryo4_gold_reset_asm(void); |
| 51 | |
| 52 | /* |
| 53 | * Execute CPU (Kryo4 silver) specific reset handler / system initialization. |
| 54 | * This takes care of executing required CPU errata's. |
| 55 | * |
| 56 | * Clobbers: x0 - x16 |
| 57 | */ |
| 58 | void qtiseclib_kryo4_silver_reset_asm(void); |
| 59 | |
| 60 | /* |
| 61 | * C Api's |
| 62 | */ |
| 63 | void qtiseclib_bl31_platform_setup(void); |
| 64 | void qtiseclib_invoke_isr(uint32_t irq, void *handle); |
| 65 | void qtiseclib_panic(void); |
| Saurabh Gorecha | 70389ca | 2020-04-22 21:31:24 +0530 | [diff] [blame] | 66 | |
| 67 | int qtiseclib_mem_assign(const memprot_info_t *mem_info, |
| 68 | uint32_t mem_info_list_cnt, |
| 69 | const uint32_t *source_vm_list, |
| 70 | uint32_t src_vm_list_cnt, |
| 71 | const memprot_dst_vm_perm_info_t *dest_vm_list, |
| 72 | uint32_t dst_vm_list_cnt); |
| 73 | |
| 74 | int qtiseclib_psci_init(uintptr_t warmboot_entry); |
| 75 | int qtiseclib_psci_node_power_on(u_register_t mpidr); |
| 76 | void qtiseclib_psci_node_on_finish(const uint8_t *states); |
| 77 | void qtiseclib_psci_cpu_standby(uint8_t pwr_state); |
| 78 | void qtiseclib_psci_node_power_off(const uint8_t *states); |
| 79 | void qtiseclib_psci_node_suspend(const uint8_t *states); |
| 80 | void qtiseclib_psci_node_suspend_finish(const uint8_t *states); |
| Saurabh Gorecha | 70389ca | 2020-04-22 21:31:24 +0530 | [diff] [blame] | 81 | void qtiseclib_disable_cluster_coherency(uint8_t state); |
| 82 | |
| 83 | #endif /* QTISECLIB_INTERFACE_H */ |