plat/nvidia/tegra/soc/t210/platform_t210.mk

#
# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
#
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# modification, are permitted provided that the following conditions are met:
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# Redistributions of source code must retain the above copyright notice, this
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# Redistributions in binary form must reproduce the above copyright notice,
# this list of conditions and the following disclaimer in the documentation
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TEGRA_BOOT_UART_BASE 			:= 0x70006000
$(eval $(call add_define,TEGRA_BOOT_UART_BASE))

TZDRAM_BASE				:= 0xFDC00000
$(eval $(call add_define,TZDRAM_BASE))

ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT	:= 1
$(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT))

ENABLE_NS_L2_CPUECTRL_RW_ACCESS		:= 1
$(eval $(call add_define,ENABLE_NS_L2_CPUECTRL_RW_ACCESS))

ENABLE_L2_DYNAMIC_RETENTION		:= 1
$(eval $(call add_define,ENABLE_L2_DYNAMIC_RETENTION))

ENABLE_CPU_DYNAMIC_RETENTION		:= 1
$(eval $(call add_define,ENABLE_CPU_DYNAMIC_RETENTION))

PLATFORM_CLUSTER_COUNT			:= 2
$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))

PLATFORM_MAX_CPUS_PER_CLUSTER		:= 4
$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))

BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
				lib/cpus/aarch64/cortex_a57.S		\
				${SOC_DIR}/plat_psci_handlers.c		\
				${SOC_DIR}/plat_setup.c			\
				${SOC_DIR}/plat_secondary.c

# Enable workarounds for selected Cortex-A53 erratas.
ERRATA_A53_826319	:=	1