commit 4e9c2315c613af4005b1e270498a8904816f0a4a
author Varun Wadekar <vwadekar@nvidia.com> Fri Aug 21 15:56:02 2015 +0530
committer Varun Wadekar <vwadekar@nvidia.com> Mon Aug 24 21:34:28 2015 +0530
tree 30a80744a1b68b1257cdbb8823eb98b2d64df598
parent 3ce4e884ede3d1c2ad9491be2022a0c431d62bcc

Tegra210: wait for 512 timer ticks before retention entry

This patch programs the CPUECTLR_EL1 and L2ECTLR_EL1 registers,
so that the core waits for 512 generic timer CNTVALUEB ticks before
entering retention state, after executing a WFI instruction.

This functionality is configurable and can be enabled for platforms
by setting the newly defined 'ENABLE_L2_DYNAMIC_RETENTION' and
'ENABLE_CPU_DYNAMIC_RETENTION' flag.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

plat/nvidia/tegra/soc/t210/platform_t210.mk

diff --git a/plat/nvidia/tegra/soc/t210/platform_t210.mk b/plat/nvidia/tegra/soc/t210/platform_t210.mk
index ca7718c..5001629 100644
--- a/plat/nvidia/tegra/soc/t210/platform_t210.mk
+++ b/plat/nvidia/tegra/soc/t210/platform_t210.mk
@@ -40,6 +40,12 @@
 ENABLE_NS_L2_CPUECTRL_RW_ACCESS		:= 1
 $(eval $(call add_define,ENABLE_NS_L2_CPUECTRL_RW_ACCESS))
 
+ENABLE_L2_DYNAMIC_RETENTION		:= 1
+$(eval $(call add_define,ENABLE_L2_DYNAMIC_RETENTION))
+
+ENABLE_CPU_DYNAMIC_RETENTION		:= 1
+$(eval $(call add_define,ENABLE_CPU_DYNAMIC_RETENTION))
+
 PLATFORM_CLUSTER_COUNT			:= 2
 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))