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filogic
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atf
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4e9c2315c613af4005b1e270498a8904816f0a4a
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plat
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nvidia
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tegra
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soc
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t210
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platform_t210.mk
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
5f4e643
Tegra: T210: include CPU files from SoC's platform.mk
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago