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git01.mediatek.com / filogic / atf / a0eaca51160da99cd2f3a4952f838faef6a776ef / . / plat / arm / css / sgi / sgi-common.mk
blob: 250458144f6034ebb2fbe420492dc83b06deace9 [file] [log] [blame]
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]1#
Alexei Fedorov2f13d6c2020-02-21 10:17:26 +0000[diff] [blame]2# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Chandni Cherukurid61a7052018-08-01 15:58:48 +0530[diff] [blame]7CSS_USE_SCMI_SDS_DRIVER := 1
8
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]9CSS_ENT_BASE := plat/arm/css/sgi
10
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +0530[diff] [blame]11RAS_EXTENSION := 0
12
Sughosh Ganu3f7e79d2018-05-16 18:48:56 +0530[diff] [blame]13SDEI_SUPPORT := 0
14
15EL3_EXCEPTION_HANDLING := 0
16
17HANDLE_EA_EL3_FIRST := 0
18
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +0530[diff] [blame]19CSS_SGI_CHIP_COUNT := 1
20
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]21INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c
22
23PLAT_INCLUDES += -I${CSS_ENT_BASE}/include
24
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]25# GIC-600 configuration
26GICV3_IMPL := GIC600
27
28# Include GICv3 driver files
29include drivers/arm/gic/v3/gicv3.mk
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]30
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000[diff] [blame]31ENT_GIC_SOURCES := ${GICV3_SOURCES} \
32 plat/common/plat_gicv3.c \
33 plat/arm/common/arm_gicv3.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]34
35PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat.c \
36 ${CSS_ENT_BASE}/aarch64/sgi_helper.S
37
Aditya Angadi20b48412019-04-16 11:29:14 +0530[diff] [blame]38BL1_SOURCES += ${INTERCONNECT_SOURCES} \
39 drivers/arm/sbsa/sbsa.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]40
Vijayenthiran Subramaniam22141b62018-10-25 22:20:24 +0530[diff] [blame]41BL2_SOURCES += ${CSS_ENT_BASE}/sgi_image_load.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]42
Chandni Cherukuria3f66132018-08-10 11:17:58 +0530[diff] [blame]43BL31_SOURCES += ${INTERCONNECT_SOURCES} \
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]44 ${ENT_GIC_SOURCES} \
45 ${CSS_ENT_BASE}/sgi_bl31_setup.c \
Chandni Cherukuria5d44ec2018-08-14 15:25:34 +0530[diff] [blame]46 ${CSS_ENT_BASE}/sgi_topology.c
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]47
Sughosh Ganu18f513d2018-05-16 17:22:35 +0530[diff] [blame]48ifeq (${RAS_EXTENSION},1)
49BL31_SOURCES += ${CSS_ENT_BASE}/sgi_ras.c
50endif
51
Deepak Pandeyb0971f92018-05-25 12:43:30 +0530[diff] [blame]52ifneq (${RESET_TO_BL31},0)
Sandrine Bailleux1e32d322019-01-07 15:35:37 +0100[diff] [blame]53 $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \
Deepak Pandeyb0971f92018-05-25 12:43:30 +0530[diff] [blame]54 Please set RESET_TO_BL31 to 0.")
55endif
56
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]57$(eval $(call add_define,SGI_PLAT))
58
Vijayenthiran Subramaniambc489912019-12-26 17:45:58 +0530[diff] [blame]59$(eval $(call add_define,CSS_SGI_CHIP_COUNT))
60
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]61override CSS_LOAD_SCP_IMAGES := 0
62override NEED_BL2U := no
63override ARM_BL31_IN_DRAM := 1
Sudipto Paulc4510102018-04-16 17:46:50 +0530[diff] [blame]64override ARM_PLAT_MT := 1
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000[diff] [blame]65
66# System coherency is managed in hardware
67HW_ASSISTED_COHERENCY := 1
68
69# When building for systems with hardware-assisted coherency, there's no need to
70# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
71USE_COHERENT_MEM := 0
72
73include plat/arm/common/arm_common.mk
74include plat/arm/css/common/css_common.mk
75include plat/arm/soc/common/soc_css.mk
76include plat/arm/board/common/board_common.mk