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Aditya Angadicdd7f632020-04-06 17:11:23 +05301/*
Rohit Mathewa0dd3072024-02-03 17:22:54 +00002 * Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved.
Aditya Angadicdd7f632020-04-06 17:11:23 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <common/debug.h>
8#include <plat/arm/common/plat_arm.h>
9#include <plat/arm/css/common/css_pm.h>
Rohit Mathewa0dd3072024-02-03 17:22:54 +000010
11#include <nrd_variant.h>
Aditya Angadicdd7f632020-04-06 17:11:23 +053012
13/******************************************************************************
14 * The power domain tree descriptor.
15 ******************************************************************************/
Aditya Angadif5039032020-12-15 17:28:08 +053016const unsigned char rd_v1_mc_pd_tree_desc_multi_chip[] = {
Aditya Angadicdd7f632020-04-06 17:11:23 +053017 ((PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT)),
18 CSS_SGI_MAX_CPUS_PER_CLUSTER,
19 CSS_SGI_MAX_CPUS_PER_CLUSTER,
20 CSS_SGI_MAX_CPUS_PER_CLUSTER,
21 CSS_SGI_MAX_CPUS_PER_CLUSTER,
22#if (CSS_SGI_CHIP_COUNT > 1)
23 CSS_SGI_MAX_CPUS_PER_CLUSTER,
24 CSS_SGI_MAX_CPUS_PER_CLUSTER,
25 CSS_SGI_MAX_CPUS_PER_CLUSTER,
26 CSS_SGI_MAX_CPUS_PER_CLUSTER,
27#endif
28#if (CSS_SGI_CHIP_COUNT > 2)
29 CSS_SGI_MAX_CPUS_PER_CLUSTER,
30 CSS_SGI_MAX_CPUS_PER_CLUSTER,
31 CSS_SGI_MAX_CPUS_PER_CLUSTER,
32 CSS_SGI_MAX_CPUS_PER_CLUSTER,
33#endif
34#if (CSS_SGI_CHIP_COUNT > 3)
35 CSS_SGI_MAX_CPUS_PER_CLUSTER,
36 CSS_SGI_MAX_CPUS_PER_CLUSTER,
37 CSS_SGI_MAX_CPUS_PER_CLUSTER,
38 CSS_SGI_MAX_CPUS_PER_CLUSTER
39#endif
40};
41
42/*******************************************************************************
43 * This function returns the topology tree information.
44 ******************************************************************************/
45const unsigned char *plat_get_power_domain_tree_desc(void)
46{
47 if (plat_arm_sgi_get_multi_chip_mode() == 1)
Aditya Angadif5039032020-12-15 17:28:08 +053048 return rd_v1_mc_pd_tree_desc_multi_chip;
Aditya Angadicdd7f632020-04-06 17:11:23 +053049 panic();
50}
51
52/*******************************************************************************
53 * The array mapping platform core position (implemented by plat_my_core_pos())
54 * to the SCMI power domain ID implemented by SCP.
55 ******************************************************************************/
56const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
57 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x0)),
58 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x1)),
59 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x2)),
60 (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x3)),
61#if (CSS_SGI_CHIP_COUNT > 1)
62 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x0)),
63 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x1)),
64 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x2)),
65 (SET_SCMI_CHANNEL_ID(0x1) | SET_SCMI_DOMAIN_ID(0x3)),
66#endif
67#if (CSS_SGI_CHIP_COUNT > 2)
68 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x0)),
69 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x1)),
70 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x2)),
71 (SET_SCMI_CHANNEL_ID(0x2) | SET_SCMI_DOMAIN_ID(0x3)),
72#endif
73#if (CSS_SGI_CHIP_COUNT > 3)
74 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x0)),
75 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x1)),
76 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x2)),
77 (SET_SCMI_CHANNEL_ID(0x3) | SET_SCMI_DOMAIN_ID(0x3))
78#endif
79};