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git01.mediatek.com / filogic / atf / a06f9f94eae38c01fdaac51262f77c5292338d52 / . / include / drivers / st / stm32_gpio.h
blob: eeef9da5dba6502e82956b16ef3932eac4867222 [file] [log] [blame]
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]1/*
Fabien Dessenne83969cf2021-09-21 11:05:06 +0200[diff] [blame]2 * Copyright (c) 2015-2022, STMicroelectronics - All Rights Reserved
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000[diff] [blame]7#ifndef STM32_GPIO_H
8#define STM32_GPIO_H
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +0000[diff] [blame]10#include <lib/utils_def.h>
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]11
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]12#define GPIO_MODE_OFFSET U(0x00)
13#define GPIO_TYPE_OFFSET U(0x04)
14#define GPIO_SPEED_OFFSET U(0x08)
15#define GPIO_PUPD_OFFSET U(0x0C)
Fabien Dessennefc51b232021-09-21 14:18:34 +0200[diff] [blame]16#define GPIO_OD_OFFSET U(0x14)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]17#define GPIO_BSRR_OFFSET U(0x18)
18#define GPIO_AFRL_OFFSET U(0x20)
19#define GPIO_AFRH_OFFSET U(0x24)
Yann Gautier038bff22019-01-17 19:17:47 +0100[diff] [blame]20#define GPIO_SECR_OFFSET U(0x30)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]21
22#define GPIO_ALT_LOWER_LIMIT U(0x08)
23
Yann Gautier038bff22019-01-17 19:17:47 +0100[diff] [blame]24#define GPIO_PIN_(_x) U(_x)
25#define GPIO_PIN_MAX GPIO_PIN_(15)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]26
Yann Gautier038bff22019-01-17 19:17:47 +0100[diff] [blame]27#define GPIO_ALTERNATE_(_x) U(_x)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]28#define GPIO_ALTERNATE_MASK U(0x0F)
29
Fabien Dessenne83969cf2021-09-21 11:05:06 +0200[diff] [blame]30#define GPIO_MODE_INPUT U(0x00)
31#define GPIO_MODE_OUTPUT U(0x01)
32#define GPIO_MODE_ALTERNATE U(0x02)
33#define GPIO_MODE_ANALOG U(0x03)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]34#define GPIO_MODE_MASK U(0x03)
35
Fabien Dessenne83969cf2021-09-21 11:05:06 +0200[diff] [blame]36#define GPIO_TYPE_PUSH_PULL U(0x00)
37#define GPIO_TYPE_OPEN_DRAIN U(0x01)
38#define GPIO_TYPE_MASK U(0x01)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]39
Fabien Dessenne83969cf2021-09-21 11:05:06 +0200[diff] [blame]40#define GPIO_SPEED_LOW U(0x00)
41#define GPIO_SPEED_MEDIUM U(0x01)
42#define GPIO_SPEED_HIGH U(0x02)
43#define GPIO_SPEED_VERY_HIGH U(0x03)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]44#define GPIO_SPEED_MASK U(0x03)
45
Fabien Dessenne83969cf2021-09-21 11:05:06 +0200[diff] [blame]46#define GPIO_NO_PULL U(0x00)
47#define GPIO_PULL_UP U(0x01)
48#define GPIO_PULL_DOWN U(0x02)
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]49#define GPIO_PULL_MASK U(0x03)
50
Fabien Dessennefc51b232021-09-21 14:18:34 +0200[diff] [blame]51#define GPIO_OD_OUTPUT_LOW U(0x00)
52#define GPIO_OD_OUTPUT_HIGH U(0x01)
53#define GPIO_OD_MASK U(0x01)
54
Julius Werner53456fc2019-07-09 13:49:11 -0700[diff] [blame]55#ifndef __ASSEMBLER__
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]56#include <stdint.h>
57
Yann Gautier038bff22019-01-17 19:17:47 +0100[diff] [blame]58int dt_set_pinctrl_config(int node);
Yann Gautier038bff22019-01-17 19:17:47 +0100[diff] [blame]59void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure);
Yann Gautier2b79c372021-06-11 10:54:56 +0200[diff] [blame]60void set_gpio_reset_cfg(uint32_t bank, uint32_t pin);
Julius Werner53456fc2019-07-09 13:49:11 -0700[diff] [blame]61#endif /*__ASSEMBLER__*/
Yann Gautierd0ca7f42018-07-13 21:33:09 +0200[diff] [blame]62
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000[diff] [blame]63#endif /* STM32_GPIO_H */