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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Alexei Fedorovcb8fef62021-04-12 12:49:54 +01002 * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
Achin Gupta69387312016-09-26 10:22:56 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Alexei Fedorov4348f492020-05-13 21:13:57 +01007/* Configuration: max 4 clusters with up to 4 CPUs */
8
Achin Gupta4f6ad662013-10-25 09:08:21 +01009/dts-v1/;
10
Alexei Fedorov4348f492020-05-13 21:13:57 +010011#define AFF
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Alexei Fedorovcb8fef62021-04-12 12:49:54 +010013#include <dt-bindings/interrupt-controller/arm-gic.h>
Alexei Fedorov9fe73b22021-04-23 16:12:11 +010014#include "fvp-defs.dtsi"
Alexei Fedorov4348f492020-05-13 21:13:57 +010015
Achin Gupta4f6ad662013-10-25 09:08:21 +010016/memreserve/ 0x80000000 0x00010000;
17
18/ {
19};
20
21/ {
22 model = "FVP Base";
23 compatible = "arm,vfp-base", "arm,vexpress";
24 interrupt-parent = <&gic>;
25 #address-cells = <2>;
26 #size-cells = <2>;
27
28 chosen { };
29
30 aliases {
31 serial0 = &v2m_serial0;
32 serial1 = &v2m_serial1;
33 serial2 = &v2m_serial2;
34 serial3 = &v2m_serial3;
35 };
36
37 psci {
Soby Mathew1df077b2015-01-15 11:49:58 +000038 compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
Achin Gupta4f6ad662013-10-25 09:08:21 +010039 method = "smc";
40 cpu_suspend = <0xc4000001>;
41 cpu_off = <0x84000002>;
42 cpu_on = <0xc4000003>;
Juan Castillo4dc4a472014-08-12 11:17:06 +010043 sys_poweroff = <0x84000008>;
44 sys_reset = <0x84000009>;
Madhukar Pappireddy26b945c2019-12-27 12:02:34 -060045 max-pwr-lvl = <2>;
Achin Gupta4f6ad662013-10-25 09:08:21 +010046 };
47
48 cpus {
49 #address-cells = <2>;
50 #size-cells = <0>;
51
Alexei Fedorov4348f492020-05-13 21:13:57 +010052 CPU_MAP
Achin Gupta5ab4fe42014-08-20 17:33:09 +010053
54 idle-states {
55 entry-method = "arm,psci";
56
57 CPU_SLEEP_0: cpu-sleep-0 {
58 compatible = "arm,idle-state";
Juan Castillo3414f542015-04-16 14:17:49 +010059 local-timer-stop;
60 arm,psci-suspend-param = <0x0010000>;
Achin Gupta5ab4fe42014-08-20 17:33:09 +010061 entry-latency-us = <40>;
62 exit-latency-us = <100>;
63 min-residency-us = <150>;
64 };
65
66 CLUSTER_SLEEP_0: cluster-sleep-0 {
67 compatible = "arm,idle-state";
Juan Castillo3414f542015-04-16 14:17:49 +010068 local-timer-stop;
69 arm,psci-suspend-param = <0x1010000>;
Achin Gupta5ab4fe42014-08-20 17:33:09 +010070 entry-latency-us = <500>;
71 exit-latency-us = <1000>;
72 min-residency-us = <2500>;
73 };
74 };
75
Alexei Fedorov4348f492020-05-13 21:13:57 +010076 CPUS
Antonio Nino Diaz430147a2016-02-22 16:44:41 +000077
78 L2_0: l2-cache0 {
79 compatible = "cache";
Achin Gupta4f6ad662013-10-25 09:08:21 +010080 };
81 };
82
83 memory@80000000 {
84 device_type = "memory";
Juan Castillo7055ca42014-05-16 15:33:15 +010085 reg = <0x00000000 0x80000000 0 0x7F000000>,
Achin Gupta4f6ad662013-10-25 09:08:21 +010086 <0x00000008 0x80000000 0 0x80000000>;
Achin Gupta4f6ad662013-10-25 09:08:21 +010087 };
88
89 gic: interrupt-controller@2f000000 {
90 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
91 #interrupt-cells = <3>;
92 #address-cells = <0>;
93 interrupt-controller;
94 reg = <0x0 0x2f000000 0 0x10000>,
95 <0x0 0x2c000000 0 0x2000>,
96 <0x0 0x2c010000 0 0x2000>,
97 <0x0 0x2c02F000 0 0x2000>;
98 interrupts = <1 9 0xf04>;
99 };
100
101 timer {
102 compatible = "arm,armv8-timer";
Alexei Fedorovcb8fef62021-04-12 12:49:54 +0100103 interrupts = <GIC_PPI 13
104 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
105 <GIC_PPI 14
106 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
107 <GIC_PPI 11
108 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
109 <GIC_PPI 10
110 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100111 clock-frequency = <100000000>;
112 };
113
114 timer@2a810000 {
115 compatible = "arm,armv7-timer-mem";
116 reg = <0x0 0x2a810000 0x0 0x10000>;
117 clock-frequency = <100000000>;
118 #address-cells = <2>;
119 #size-cells = <2>;
120 ranges;
Harry Liebelcef93392014-04-01 19:27:38 +0100121 frame@2a830000 {
122 frame-number = <1>;
123 interrupts = <0 26 4>;
124 reg = <0x0 0x2a830000 0x0 0x10000>;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100125 };
126 };
127
128 pmu {
129 compatible = "arm,armv8-pmuv3";
130 interrupts = <0 60 4>,
131 <0 61 4>,
132 <0 62 4>,
133 <0 63 4>;
134 };
135
136 smb {
137 compatible = "simple-bus";
138
139 #address-cells = <2>;
140 #size-cells = <1>;
141 ranges = <0 0 0 0x08000000 0x04000000>,
142 <1 0 0 0x14000000 0x04000000>,
143 <2 0 0 0x18000000 0x04000000>,
144 <3 0 0 0x1c000000 0x04000000>,
145 <4 0 0 0x0c000000 0x04000000>,
146 <5 0 0 0x10000000 0x04000000>;
147
Balint Dobszay5ce2c322020-01-10 17:16:27 +0100148 #include "rtsm_ve-motherboard.dtsi"
Achin Gupta4f6ad662013-10-25 09:08:21 +0100149 };
150
151 panels {
152 panel@0 {
153 compatible = "panel";
154 mode = "XVGA";
155 refresh = <60>;
156 xres = <1024>;
157 yres = <768>;
158 pixclock = <15748>;
159 left_margin = <152>;
160 right_margin = <48>;
161 upper_margin = <23>;
162 lower_margin = <3>;
163 hsync_len = <104>;
164 vsync_len = <4>;
165 sync = <0>;
166 vmode = "FB_VMODE_NONINTERLACED";
167 tim2 = "TIM2_BCD", "TIM2_IPC";
168 cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
169 caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
170 bpp = <16>;
171 };
172 };
173};