blob: 000135239d4bf6207ea37794a7f5978d2dcbf4c8 [file] [log] [blame]
Ghennadi Procopciuc1e38cff2024-01-26 15:29:08 +02001/*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <plat/common/platform.h>
8#include <plat_helpers.h>
9
10const unsigned char *plat_get_power_domain_tree_desc(void)
11{
12 static const unsigned char s32g_power_domain_tree_desc[] = {
13 PLATFORM_SYSTEM_COUNT,
14 PLATFORM_CLUSTER_COUNT,
15 PLATFORM_CORE_COUNT / U(2),
16 PLATFORM_CORE_COUNT / U(2),
17 };
18
19 return s32g_power_domain_tree_desc;
20}
21
22int plat_core_pos_by_mpidr(u_register_t mpidr)
23{
24 unsigned int cluster_id, cpu_id, core_id;
25 u_register_t mpidr_priv = mpidr;
26
27 mpidr_priv &= MPIDR_AFFINITY_MASK;
28
29 if ((mpidr_priv & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0) {
30 return -1;
31 }
32
33 cluster_id = MPIDR_AFFLVL1_VAL(mpidr_priv);
34 cpu_id = MPIDR_AFFLVL0_VAL(mpidr_priv);
35
36 if ((cluster_id >= PLATFORM_CLUSTER_COUNT) ||
37 (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER)) {
38 return -1;
39 }
40
41 core_id = s32g2_core_pos_by_mpidr(mpidr_priv);
42 if (core_id >= PLATFORM_CORE_COUNT) {
43 return -1;
44 }
45
46 return (int)core_id;
47}
48
49unsigned int plat_get_syscnt_freq2(void)
50{
51 return COUNTER_FREQUENCY;
52}