| jason-ch chen | fa82b9b | 2021-11-16 09:48:20 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2022, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __SSPM_REG_H__ |
| 8 | #define __SSPM_REG_H__ |
| 9 | |
| 10 | #include "platform_def.h" |
| 11 | |
| 12 | #define SSPM_CFGREG_BASE (IO_PHYS + 0x440000) /* SSPM view: 0x30040000 */ |
| 13 | #define SSPM_CFGREG_ADDR(ofs) (SSPM_CFGREG_BASE + (ofs)) |
| 14 | |
| 15 | #define SSPM_MCDI_SHARE_SRAM (IO_PHYS + 0x420000) |
| 16 | #define SSPM_MBOX_3_BASE (IO_PHYS + 0x480000) |
| 17 | |
| 18 | #define SSPM_HW_SEM SSPM_CFGREG_ADDR(0x0048) |
| 19 | #define SSPM_ACAO_INT_SET SSPM_CFGREG_ADDR(0x00D8) |
| 20 | #define SSPM_ACAO_INT_CLR SSPM_CFGREG_ADDR(0x00DC) |
| 21 | |
| 22 | #define STANDBYWFI_EN(n) (1 << (n + 8)) |
| 23 | #define GIC_IRQOUT_EN(n) (1 << (n + 0)) |
| 24 | |
| 25 | #endif /* __SSPM_REG_H__ */ |