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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz1f470022018-03-27 09:39:47 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <assert_macros.S>
10#include <platform_def.h>
11
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000012 .globl plat_crash_console_flush
13 .globl plat_crash_console_init
14 .globl plat_crash_console_putc
15 .globl platform_mem_init
16 .globl plat_get_my_entrypoint
17 .globl plat_is_my_cpu_primary
18 .globl plat_my_core_pos
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000019 .globl plat_rpi3_calc_core_pos
20 .globl plat_secondary_cold_boot_setup
21
22 /* -----------------------------------------------------
23 * unsigned int plat_my_core_pos(void)
24 *
25 * This function uses the plat_rpi3_calc_core_pos()
26 * definition to get the index of the calling CPU.
27 * -----------------------------------------------------
28 */
29func plat_my_core_pos
30 mrs x0, mpidr_el1
31 b plat_rpi3_calc_core_pos
32endfunc plat_my_core_pos
33
34 /* -----------------------------------------------------
35 * unsigned int plat_rpi3_calc_core_pos(u_register_t mpidr);
36 *
37 * CorePos = (ClusterId * 4) + CoreId
38 * -----------------------------------------------------
39 */
40func plat_rpi3_calc_core_pos
41 and x1, x0, #MPIDR_CPU_MASK
42 and x0, x0, #MPIDR_CLUSTER_MASK
43 add x0, x1, x0, LSR #6
44 ret
45endfunc plat_rpi3_calc_core_pos
46
47 /* -----------------------------------------------------
48 * unsigned int plat_is_my_cpu_primary (void);
49 *
50 * Find out whether the current cpu is the primary
51 * cpu.
52 * -----------------------------------------------------
53 */
54func plat_is_my_cpu_primary
55 mrs x0, mpidr_el1
56 and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
57 cmp x0, #RPI3_PRIMARY_CPU
58 cset w0, eq
59 ret
60endfunc plat_is_my_cpu_primary
61
62 /* -----------------------------------------------------
63 * void plat_secondary_cold_boot_setup (void);
64 *
65 * This function performs any platform specific actions
66 * needed for a secondary cpu after a cold reset e.g
67 * mark the cpu's presence, mechanism to place it in a
68 * holding pen etc.
69 * -----------------------------------------------------
70 */
71func plat_secondary_cold_boot_setup
72 /* Calculate address of our hold entry */
73 bl plat_my_core_pos
74 lsl x0, x0, #3
75 mov_imm x2, PLAT_RPI3_TM_HOLD_BASE
76 add x0, x0, x2
77
78 /*
79 * This code runs way before requesting the warmboot of this core,
80 * so it is possible to clear the mailbox before getting a request
81 * to boot.
82 */
83 mov x1, PLAT_RPI3_TM_HOLD_STATE_WAIT
84 str x1,[x0]
85
86 /* Wait until we have a go */
87poll_mailbox:
88 wfe
89 ldr x1, [x0]
90 cmp x1, PLAT_RPI3_TM_HOLD_STATE_GO
91 bne poll_mailbox
92
93 /* Jump to the provided entrypoint */
94 mov_imm x0, PLAT_RPI3_TM_ENTRYPOINT
95 ldr x1, [x0]
96 br x1
97endfunc plat_secondary_cold_boot_setup
98
99 /* ---------------------------------------------------------------------
100 * uintptr_t plat_get_my_entrypoint (void);
101 *
102 * Main job of this routine is to distinguish between a cold and a warm
103 * boot.
104 *
105 * This functions returns:
106 * - 0 for a cold boot.
107 * - Any other value for a warm boot.
108 * ---------------------------------------------------------------------
109 */
110func plat_get_my_entrypoint
111 /* TODO: support warm boot */
112 mov x0, #0
113 ret
114endfunc plat_get_my_entrypoint
115
116 /* ---------------------------------------------
117 * void platform_mem_init (void);
118 *
119 * No need to carry out any memory initialization.
120 * ---------------------------------------------
121 */
122func platform_mem_init
123 ret
124endfunc platform_mem_init
125
126 /* ---------------------------------------------
127 * int plat_crash_console_init(void)
128 * Function to initialize the crash console
129 * without a C Runtime to print crash report.
130 * Clobber list : x0 - x3
131 * ---------------------------------------------
132 */
133func plat_crash_console_init
Andre Przywara57ccecc2020-03-10 12:33:16 +0000134 mov_imm x0, PLAT_RPI_MINI_UART_BASE
135 mov x1, xzr
136 mov x2, xzr
Antonio Nino Diaz1f470022018-03-27 09:39:47 +0100137 b console_16550_core_init
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000138endfunc plat_crash_console_init
139
140 /* ---------------------------------------------
141 * int plat_crash_console_putc(int c)
142 * Function to print a character on the crash
143 * console without a C Runtime.
144 * Clobber list : x1, x2
145 * ---------------------------------------------
146 */
147func plat_crash_console_putc
Andre Przywara57ccecc2020-03-10 12:33:16 +0000148 mov_imm x1, PLAT_RPI_MINI_UART_BASE
Antonio Nino Diaz1f470022018-03-27 09:39:47 +0100149 b console_16550_core_putc
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000150endfunc plat_crash_console_putc
151
152 /* ---------------------------------------------
153 * int plat_crash_console_flush()
154 * Function to force a write of all buffered
155 * data that hasn't been output.
156 * Out : return -1 on error else return 0.
157 * Clobber list : x0, x1
158 * ---------------------------------------------
159 */
160func plat_crash_console_flush
Andre Przywara57ccecc2020-03-10 12:33:16 +0000161 mov_imm x0, PLAT_RPI_MINI_UART_BASE
Antonio Nino Diaz1f470022018-03-27 09:39:47 +0100162 b console_16550_core_flush
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000163endfunc plat_crash_console_flush