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Yann Gautieree8f5422019-02-14 11:13:25 +01001/*
Yann Gautiera55169b2020-01-10 18:18:59 +01002 * Copyright (C) 2018-2020, STMicroelectronics - All Rights Reserved
Yann Gautieree8f5422019-02-14 11:13:25 +01003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef STM32MP_COMMON_H
8#define STM32MP_COMMON_H
9
Yann Gautiera2e2a302019-02-14 11:13:39 +010010#include <stdbool.h>
11
Yann Gautiere97b6632019-04-19 10:48:36 +020012#include <platform_def.h>
13
Yann Gautieree8f5422019-02-14 11:13:25 +010014/* Functions to save and get boot context address given by ROM code */
Yann Gautiera2e2a302019-02-14 11:13:39 +010015void stm32mp_save_boot_ctx_address(uintptr_t address);
16uintptr_t stm32mp_get_boot_ctx_address(void);
Yann Gautieree8f5422019-02-14 11:13:25 +010017
Yann Gautieraf19ff92019-06-04 18:23:10 +020018bool stm32mp_is_single_core(void);
Lionel Debieve0e73d732019-09-16 12:17:09 +020019bool stm32mp_is_closed_device(void);
Yann Gautieraf19ff92019-06-04 18:23:10 +020020
Yann Gautier3d78a2e2019-02-14 11:01:20 +010021/* Return the base address of the DDR controller */
22uintptr_t stm32mp_ddrctrl_base(void);
23
24/* Return the base address of the DDR PHY */
25uintptr_t stm32mp_ddrphyc_base(void);
26
27/* Return the base address of the PWR peripheral */
28uintptr_t stm32mp_pwr_base(void);
29
30/* Return the base address of the RCC peripheral */
31uintptr_t stm32mp_rcc_base(void);
32
Yann Gautierf540a592019-05-22 19:13:51 +020033/* Check MMU status to allow spinlock use */
34bool stm32mp_lock_available(void);
35
Yann Gautier091eab52019-06-04 18:06:34 +020036/* Get IWDG platform instance ID from peripheral IO memory base address */
37uint32_t stm32_iwdg_get_instance(uintptr_t base);
38
39/* Return bitflag mask for expected IWDG configuration from OTP content */
40uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst);
41
42#if defined(IMAGE_BL2)
43/* Update OTP shadow registers with IWDG configuration from device tree */
44uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags);
45#endif
46
Yann Gautieree8f5422019-02-14 11:13:25 +010047/*
48 * Platform util functions for the GPIO driver
49 * @bank: Target GPIO bank ID as per DT bindings
50 *
51 * Platform shall implement these functions to provide to stm32_gpio
52 * driver the resource reference for a target GPIO bank. That are
53 * memory mapped interface base address, interface offset (see below)
54 * and clock identifier.
55 *
56 * stm32_get_gpio_bank_offset() returns a bank offset that is used to
57 * check DT configuration matches platform implementation of the banks
58 * description.
59 */
60uintptr_t stm32_get_gpio_bank_base(unsigned int bank);
61unsigned long stm32_get_gpio_bank_clock(unsigned int bank);
62uint32_t stm32_get_gpio_bank_offset(unsigned int bank);
63
Etienne Carriered81dadf2020-04-25 11:14:45 +020064/* Return node offset for target GPIO bank ID @bank or a FDT error code */
65int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank);
66
Yann Gautierc7374052019-06-04 18:02:37 +020067/* Print CPU information */
68void stm32mp_print_cpuinfo(void);
69
Yann Gautier35dc0772019-05-13 18:34:48 +020070/* Print board information */
71void stm32mp_print_boardinfo(void);
72
Yann Gautiera2e2a302019-02-14 11:13:39 +010073/*
74 * Util for clock gating and to get clock rate for stm32 and platform drivers
75 * @id: Target clock ID, ID used in clock DT bindings
76 */
77bool stm32mp_clk_is_enabled(unsigned long id);
Yann Gautiere4a3c352019-02-14 10:53:33 +010078void stm32mp_clk_enable(unsigned long id);
79void stm32mp_clk_disable(unsigned long id);
Yann Gautiera2e2a302019-02-14 11:13:39 +010080unsigned long stm32mp_clk_get_rate(unsigned long id);
81
Yann Gautieree8f5422019-02-14 11:13:25 +010082/* Initialise the IO layer and register platform IO devices */
Yann Gautiera2e2a302019-02-14 11:13:39 +010083void stm32mp_io_setup(void);
Yann Gautieree8f5422019-02-14 11:13:25 +010084
Yann Gautiere97b6632019-04-19 10:48:36 +020085/*
86 * Check that the STM32 header of a .stm32 binary image is valid
87 * @param header: pointer to the stm32 image header
88 * @param buffer: address of the binary image (payload)
89 * @return: 0 on success, negative value in case of error
90 */
91int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer);
92
Yann Gautiera55169b2020-01-10 18:18:59 +010093/* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */
94int stm32mp_map_ddr_non_cacheable(void);
95int stm32mp_unmap_ddr(void);
96
Yann Gautieree8f5422019-02-14 11:13:25 +010097#endif /* STM32MP_COMMON_H */