blob: 3c675b296bc992a6a1c05b7bc223642d79da0315 [file] [log] [blame]
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03001/*
2 * Copyright (C) 2018 Marvell International Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 * https://spdx.org/licenses
6 */
7
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03008#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009
10#include <arch_helpers.h>
11#include <lib/psci/psci.h>
12
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030013#include <marvell_pm.h>
14
15/* Standard ARM platforms are expected to export plat_arm_psci_pm_ops */
16extern const plat_psci_ops_t plat_arm_psci_pm_ops;
17
18/*****************************************************************************
19 * Private function to program the mailbox for a cpu before it is released
20 * from reset. This function assumes that the mail box base is within
21 * the MARVELL_SHARED_RAM region
22 *****************************************************************************
23 */
24void marvell_program_mailbox(uintptr_t address)
25{
26 uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE;
27
28 /*
29 * Ensure that the PLAT_MARVELL_MAILBOX_BASE is within
30 * MARVELL_SHARED_RAM region.
31 */
32 assert((PLAT_MARVELL_MAILBOX_BASE >= MARVELL_SHARED_RAM_BASE) &&
33 ((PLAT_MARVELL_MAILBOX_BASE + sizeof(*mailbox)) <=
34 (MARVELL_SHARED_RAM_BASE + MARVELL_SHARED_RAM_SIZE)));
35
36 mailbox[MBOX_IDX_MAGIC] = MVEBU_MAILBOX_MAGIC_NUM;
37 mailbox[MBOX_IDX_SEC_ADDR] = address;
38
39 /* Flush data cache if the mail box shared RAM is cached */
40#if PLAT_MARVELL_SHARED_RAM_CACHED
41 flush_dcache_range((uintptr_t)PLAT_MARVELL_MAILBOX_BASE +
42 8 * MBOX_IDX_MAGIC,
43 2 * sizeof(uint64_t));
44#endif
45}
46
47/*****************************************************************************
48 * The ARM Standard platform definition of platform porting API
49 * `plat_setup_psci_ops`.
50 *****************************************************************************
51 */
52int plat_setup_psci_ops(uintptr_t sec_entrypoint,
53 const plat_psci_ops_t **psci_ops)
54{
55 *psci_ops = &plat_arm_psci_pm_ops;
56
57 /* Setup mailbox with entry point. */
58 marvell_program_mailbox(sec_entrypoint);
59 return 0;
60}