Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 1 | /* |
Boyan Karatotev | 6468d4a | 2023-02-16 15:12:45 +0000 | [diff] [blame] | 2 | * Copyright (c) 2021-2023, Arm Limited. All rights reserved. |
Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 7 | #include <arch.h> |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 8 | #include <arch_features.h> |
Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 9 | #include <arch_helpers.h> |
| 10 | #include <lib/extensions/trf.h> |
| 11 | |
Boyan Karatotev | 6468d4a | 2023-02-16 15:12:45 +0000 | [diff] [blame] | 12 | void trf_init_el3(void) |
Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 13 | { |
Boyan Karatotev | 6468d4a | 2023-02-16 15:12:45 +0000 | [diff] [blame] | 14 | u_register_t val; |
Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 15 | |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 16 | /* |
| 17 | * MDCR_EL3.TTRF = b0 |
| 18 | * Allow access of trace filter control registers from NS-EL2 |
| 19 | * and NS-EL1 when NS-EL2 is implemented but not used |
| 20 | */ |
| 21 | val = read_mdcr_el3(); |
| 22 | val &= ~MDCR_TTRF_BIT; |
| 23 | write_mdcr_el3(val); |
Manish V Badarkhe | 51a9711 | 2021-07-08 09:33:18 +0100 | [diff] [blame] | 24 | } |
Boyan Karatotev | 6468d4a | 2023-02-16 15:12:45 +0000 | [diff] [blame] | 25 | |
| 26 | void trf_init_el2_unused(void) |
| 27 | { |
| 28 | /* |
| 29 | * MDCR_EL2.TTRF: Set to zero so that access to Trace |
| 30 | * Filter Control register TRFCR_EL1 at EL1 is not |
| 31 | * trapped to EL2. This bit is RES0 in versions of |
| 32 | * the architecture earlier than ARMv8.4. |
| 33 | * |
| 34 | */ |
| 35 | write_mdcr_el2(read_mdcr_el2() & ~MDCR_EL2_TTRF); |
| 36 | } |