Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <stdint.h> |
| 8 | |
| 9 | #include <common/debug.h> |
| 10 | #include <lib/mmio.h> |
| 11 | |
| 12 | #if RCAR_LSI == RCAR_AUTO |
Lad Prabhakar | ef124a2 | 2020-12-11 20:06:59 +0000 | [diff] [blame] | 13 | #include "G2H/qos_init_g2h_v30.h" |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 14 | #include "G2M/qos_init_g2m_v10.h" |
| 15 | #include "G2M/qos_init_g2m_v11.h" |
| 16 | #include "G2M/qos_init_g2m_v30.h" |
Lad Prabhakar | 964fcb2 | 2021-03-18 18:54:15 +0000 | [diff] [blame^] | 17 | #include "G2N/qos_init_g2n_v10.h" |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 18 | #endif /* RCAR_LSI == RCAR_AUTO */ |
| 19 | #if (RCAR_LSI == RZ_G2M) |
| 20 | #include "G2M/qos_init_g2m_v10.h" |
| 21 | #include "G2M/qos_init_g2m_v11.h" |
| 22 | #include "G2M/qos_init_g2m_v30.h" |
| 23 | #endif /* RCAR_LSI == RZ_G2M */ |
Lad Prabhakar | ef124a2 | 2020-12-11 20:06:59 +0000 | [diff] [blame] | 24 | #if RCAR_LSI == RZ_G2H |
| 25 | #include "G2H/qos_init_g2h_v30.h" |
| 26 | #endif /* RCAR_LSI == RZ_G2H */ |
Lad Prabhakar | 964fcb2 | 2021-03-18 18:54:15 +0000 | [diff] [blame^] | 27 | #if RCAR_LSI == RZ_G2N |
| 28 | #include "G2N/qos_init_g2n_v10.h" |
| 29 | #endif /* RCAR_LSI == RZ_G2N */ |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 30 | #include "qos_common.h" |
| 31 | #include "qos_init.h" |
| 32 | #include "qos_reg.h" |
| 33 | #include "rcar_def.h" |
| 34 | |
| 35 | #define DRAM_CH_CNT 0x04U |
| 36 | uint32_t qos_init_ddr_ch; |
| 37 | uint8_t qos_init_ddr_phyvalid; |
| 38 | |
| 39 | #define PRR_PRODUCT_ERR(reg) \ |
| 40 | { \ |
| 41 | ERROR("LSI Product ID(PRR=0x%x) QoS " \ |
| 42 | "initialize not supported.\n", reg); \ |
| 43 | panic(); \ |
| 44 | } |
| 45 | |
| 46 | #define PRR_CUT_ERR(reg) \ |
| 47 | { \ |
| 48 | ERROR("LSI Cut ID(PRR=0x%x) QoS " \ |
| 49 | "initialize not supported.\n", reg); \ |
| 50 | panic(); \ |
| 51 | } |
| 52 | |
| 53 | void rzg_qos_init(void) |
| 54 | { |
| 55 | uint32_t reg; |
| 56 | uint32_t i; |
| 57 | |
| 58 | qos_init_ddr_ch = 0U; |
Lad Prabhakar | 9f2b579 | 2021-03-10 14:30:20 +0000 | [diff] [blame] | 59 | qos_init_ddr_phyvalid = get_boardcnf_phyvalid(); |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 60 | for (i = 0U; i < DRAM_CH_CNT; i++) { |
| 61 | if ((qos_init_ddr_phyvalid & (1U << i))) { |
| 62 | qos_init_ddr_ch++; |
| 63 | } |
| 64 | } |
| 65 | |
| 66 | reg = mmio_read_32(PRR); |
| 67 | #if (RCAR_LSI == RCAR_AUTO) || RCAR_LSI_CUT_COMPAT |
| 68 | switch (reg & PRR_PRODUCT_MASK) { |
| 69 | case PRR_PRODUCT_M3: |
| 70 | #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) |
| 71 | switch (reg & PRR_CUT_MASK) { |
| 72 | case PRR_PRODUCT_10: |
| 73 | qos_init_g2m_v10(); |
| 74 | break; |
| 75 | case PRR_PRODUCT_21: /* G2M Cut 13 */ |
| 76 | qos_init_g2m_v11(); |
| 77 | break; |
| 78 | case PRR_PRODUCT_30: /* G2M Cut 30 */ |
| 79 | default: |
| 80 | qos_init_g2m_v30(); |
| 81 | break; |
| 82 | } |
| 83 | #else /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */ |
| 84 | PRR_PRODUCT_ERR(reg); |
| 85 | #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */ |
| 86 | break; |
Lad Prabhakar | ef124a2 | 2020-12-11 20:06:59 +0000 | [diff] [blame] | 87 | case PRR_PRODUCT_H3: |
| 88 | #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H) |
| 89 | switch (reg & PRR_CUT_MASK) { |
| 90 | case PRR_PRODUCT_30: |
| 91 | default: |
| 92 | qos_init_g2h_v30(); |
| 93 | break; |
| 94 | } |
| 95 | #else |
| 96 | PRR_PRODUCT_ERR(reg); |
| 97 | #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H) */ |
| 98 | break; |
Lad Prabhakar | 964fcb2 | 2021-03-18 18:54:15 +0000 | [diff] [blame^] | 99 | case PRR_PRODUCT_M3N: |
| 100 | #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) |
| 101 | switch (reg & PRR_CUT_MASK) { |
| 102 | case PRR_PRODUCT_10: |
| 103 | default: |
| 104 | qos_init_g2n_v10(); |
| 105 | break; |
| 106 | } |
| 107 | #else |
| 108 | PRR_PRODUCT_ERR(reg); |
| 109 | #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) */ |
| 110 | break; |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 111 | default: |
| 112 | PRR_PRODUCT_ERR(reg); |
| 113 | break; |
| 114 | } |
| 115 | #else /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */ |
| 116 | #if (RCAR_LSI == RZ_G2M) |
| 117 | #if RCAR_LSI_CUT == RCAR_CUT_10 |
| 118 | /* G2M Cut 10 */ |
| 119 | if ((PRR_PRODUCT_M3 | PRR_PRODUCT_10) |
| 120 | != (reg & (PRR_PRODUCT_MASK | PRR_CUT_MASK))) { |
| 121 | PRR_PRODUCT_ERR(reg); |
| 122 | } |
| 123 | qos_init_g2m_v10(); |
| 124 | #elif RCAR_LSI_CUT == RCAR_CUT_11 |
| 125 | /* G2M Cut 11 */ |
| 126 | if ((PRR_PRODUCT_M3 | PRR_PRODUCT_20) |
| 127 | != (reg & (PRR_PRODUCT_MASK | PRR_CUT_MASK))) { |
| 128 | PRR_PRODUCT_ERR(reg); |
| 129 | } |
| 130 | qos_init_g2m_v11(); |
| 131 | #elif RCAR_LSI_CUT == RCAR_CUT_13 |
| 132 | /* G2M Cut 13 */ |
| 133 | if ((PRR_PRODUCT_M3 | PRR_PRODUCT_21) |
| 134 | != (reg & (PRR_PRODUCT_MASK | PRR_CUT_MASK))) { |
| 135 | PRR_PRODUCT_ERR(reg); |
| 136 | } |
| 137 | qos_init_g2m_v11(); |
| 138 | #else |
| 139 | /* G2M Cut 30 or later */ |
| 140 | if ((PRR_PRODUCT_M3) |
| 141 | != (reg & (PRR_PRODUCT_MASK))) { |
| 142 | PRR_PRODUCT_ERR(reg); |
| 143 | } |
| 144 | qos_init_g2m_v30(); |
| 145 | #endif /* RCAR_LSI_CUT == RCAR_CUT_10 */ |
Lad Prabhakar | ef124a2 | 2020-12-11 20:06:59 +0000 | [diff] [blame] | 146 | #elif (RCAR_LSI == RZ_G2H) |
| 147 | /* G2H Cut 30 or later */ |
| 148 | if ((reg & PRR_PRODUCT_MASK) != PRR_PRODUCT_H3) { |
| 149 | PRR_PRODUCT_ERR(reg); |
| 150 | } |
| 151 | qos_init_g2h_v30(); |
Lad Prabhakar | 964fcb2 | 2021-03-18 18:54:15 +0000 | [diff] [blame^] | 152 | #elif (RCAR_LSI == RZ_G2N) |
| 153 | /* G2N Cut 10 or later */ |
| 154 | if ((reg & (PRR_PRODUCT_MASK)) != PRR_PRODUCT_M3N) { |
| 155 | PRR_PRODUCT_ERR(reg); |
| 156 | } |
| 157 | qos_init_g2n_v10(); |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 158 | #else /* (RCAR_LSI == RZ_G2M) */ |
| 159 | #error "Don't have QoS initialize routine(Unknown chip)." |
| 160 | #endif /* (RCAR_LSI == RZ_G2M) */ |
| 161 | #endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */ |
| 162 | } |
| 163 | |
| 164 | uint32_t get_refperiod(void) |
| 165 | { |
| 166 | uint32_t refperiod = QOSWT_WTSET0_CYCLE; |
| 167 | |
| 168 | #if (RCAR_LSI == RCAR_AUTO) || RCAR_LSI_CUT_COMPAT |
| 169 | uint32_t reg; |
| 170 | |
| 171 | reg = mmio_read_32(PRR); |
| 172 | switch (reg & PRR_PRODUCT_MASK) { |
| 173 | #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) |
| 174 | case PRR_PRODUCT_M3: |
| 175 | switch (reg & PRR_CUT_MASK) { |
| 176 | case PRR_PRODUCT_10: |
| 177 | break; |
| 178 | case PRR_PRODUCT_20: /* G2M Cut 11 */ |
| 179 | case PRR_PRODUCT_21: /* G2M Cut 13 */ |
| 180 | case PRR_PRODUCT_30: /* G2M Cut 30 */ |
| 181 | default: |
| 182 | refperiod = REFPERIOD_CYCLE; |
| 183 | break; |
| 184 | } |
| 185 | break; |
| 186 | #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) */ |
Lad Prabhakar | ef124a2 | 2020-12-11 20:06:59 +0000 | [diff] [blame] | 187 | #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H) |
| 188 | case PRR_PRODUCT_H3: |
| 189 | switch (reg & PRR_CUT_MASK) { |
| 190 | case PRR_PRODUCT_30: |
| 191 | default: |
| 192 | refperiod = REFPERIOD_CYCLE; |
| 193 | break; |
| 194 | } |
| 195 | break; |
| 196 | #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2H) */ |
Lad Prabhakar | 964fcb2 | 2021-03-18 18:54:15 +0000 | [diff] [blame^] | 197 | #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) |
| 198 | case PRR_PRODUCT_M3N: |
| 199 | refperiod = REFPERIOD_CYCLE; |
| 200 | break; |
| 201 | #endif /* (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2N) */ |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 202 | default: |
| 203 | break; |
| 204 | } |
| 205 | #elif RCAR_LSI == RZ_G2M |
| 206 | #if RCAR_LSI_CUT == RCAR_CUT_10 |
| 207 | /* G2M Cut 10 */ |
| 208 | #else /* RCAR_LSI_CUT == RCAR_CUT_10 */ |
| 209 | /* G2M Cut 11|13|30 or later */ |
| 210 | refperiod = REFPERIOD_CYCLE; |
| 211 | #endif /* RCAR_LSI_CUT == RCAR_CUT_10 */ |
Lad Prabhakar | 964fcb2 | 2021-03-18 18:54:15 +0000 | [diff] [blame^] | 212 | #elif RCAR_LSI == RZ_G2N |
| 213 | refperiod = REFPERIOD_CYCLE; |
Lad Prabhakar | ef124a2 | 2020-12-11 20:06:59 +0000 | [diff] [blame] | 214 | #elif RCAR_LSI == RZ_G2H |
| 215 | /* G2H Cut 30 or later */ |
| 216 | refperiod = REFPERIOD_CYCLE; |
Biju Das | 2161542 | 2020-11-09 09:38:51 +0000 | [diff] [blame] | 217 | #endif /* RCAR_LSI == RCAR_AUTO || RCAR_LSI_CUT_COMPAT */ |
| 218 | return refperiod; |
| 219 | } |
| 220 | |
| 221 | void rzg_qos_dbsc_setting(const struct rcar_gen3_dbsc_qos_settings *qos, |
| 222 | unsigned int qos_size, bool dbsc_wren) |
| 223 | { |
| 224 | unsigned int i; |
| 225 | |
| 226 | /* Register write enable */ |
| 227 | if (dbsc_wren) { |
| 228 | mmio_write_32(DBSC_DBSYSCNT0, 0x00001234U); |
| 229 | } |
| 230 | |
| 231 | for (i = 0; i < qos_size; i++) { |
| 232 | mmio_write_32(qos[i].reg, qos[i].val); |
| 233 | } |
| 234 | |
| 235 | /* Register write protect */ |
| 236 | if (dbsc_wren) { |
| 237 | mmio_write_32(DBSC_DBSYSCNT0, 0x00000000U); |
| 238 | } |
| 239 | } |