developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 1 | /* |
Ambroise Vincent | 962109f | 2019-03-27 13:48:15 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. |
developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 5 | */ |
| 6 | #include <arch.h> |
| 7 | #include <asm_macros.S> |
| 8 | #include <mt8173_def.h> |
| 9 | |
| 10 | .globl plat_secondary_cold_boot_setup |
| 11 | .globl plat_report_exception |
| 12 | .globl platform_is_primary_cpu |
Koan-Sin Tan | bc99807 | 2017-01-19 16:43:49 +0800 | [diff] [blame] | 13 | .globl plat_my_core_pos |
developer | 65014b8 | 2015-04-13 14:47:57 +0800 | [diff] [blame] | 14 | |
| 15 | /* ----------------------------------------------------- |
| 16 | * void plat_secondary_cold_boot_setup (void); |
| 17 | * |
| 18 | * This function performs any platform specific actions |
| 19 | * needed for a secondary cpu after a cold reset e.g |
| 20 | * mark the cpu's presence, mechanism to place it in a |
| 21 | * holding pen etc. |
| 22 | * ----------------------------------------------------- |
| 23 | */ |
| 24 | func plat_secondary_cold_boot_setup |
| 25 | /* MT8173 Oak does not do cold boot for secondary CPU */ |
| 26 | cb_panic: |
| 27 | b cb_panic |
| 28 | endfunc plat_secondary_cold_boot_setup |
| 29 | |
| 30 | func platform_is_primary_cpu |
| 31 | and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) |
| 32 | cmp x0, #MT8173_PRIMARY_CPU |
| 33 | cset x0, eq |
| 34 | ret |
| 35 | endfunc platform_is_primary_cpu |
| 36 | |
Koan-Sin Tan | bc99807 | 2017-01-19 16:43:49 +0800 | [diff] [blame] | 37 | /* ----------------------------------------------------- |
| 38 | * unsigned int plat_my_core_pos(void); |
| 39 | * |
| 40 | * result: CorePos = CoreId + (ClusterId << 2) |
| 41 | * ----------------------------------------------------- |
| 42 | */ |
| 43 | func plat_my_core_pos |
| 44 | mrs x0, mpidr_el1 |
| 45 | and x1, x0, #MPIDR_CPU_MASK |
| 46 | and x0, x0, #MPIDR_CLUSTER_MASK |
| 47 | add x0, x1, x0, LSR #6 |
| 48 | ret |
| 49 | endfunc plat_my_core_pos |