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Varun Wadekarb316e242015-05-19 16:48:04 +05301/*
Varun Wadekarc92050b2017-03-29 14:57:29 -07002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Varun Wadekara9cb0102019-06-17 11:45:11 -07003 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
Varun Wadekarb316e242015-05-19 16:48:04 +05304 *
dp-armfa3cf0b2017-05-03 09:38:09 +01005 * SPDX-License-Identifier: BSD-3-Clause
Varun Wadekarb316e242015-05-19 16:48:04 +05306 */
7
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00008#ifndef MEMCTRL_H
9#define MEMCTRL_H
Varun Wadekarb316e242015-05-19 16:48:04 +053010
Varun Wadekarb316e242015-05-19 16:48:04 +053011void tegra_memctrl_setup(void);
Varun Wadekar6eec6d62016-03-03 13:28:10 -080012void tegra_memctrl_restore_settings(void);
Varun Wadekarb316e242015-05-19 16:48:04 +053013void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes);
Varun Wadekar7a269e22015-06-10 14:04:32 +053014void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes);
Varun Wadekarc92050b2017-03-29 14:57:29 -070015void tegra_memctrl_disable_ahb_redirection(void);
Harvey Hsieh359be952017-08-21 15:01:53 +080016void tegra_memctrl_clear_pending_interrupts(void);
Varun Wadekarb316e242015-05-19 16:48:04 +053017
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000018#endif /* MEMCTRL_H */