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Varun Wadekarb3741032017-09-25 13:27:45 -07001/*
steven kao05ee5822018-01-02 19:07:00 -08002 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Varun Wadekarb3741032017-09-25 13:27:45 -07003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __BPMP_IPC_H__
8#define __BPMP_IPC_H__
9
10#include <stdbool.h>
11#include <stdint.h>
12#include <utils_def.h>
13
14/**
15 * Currently supported reset identifiers
16 */
17#define TEGRA_RESET_ID_XUSB_PADCTL U(114)
18#define TEGRA_RESET_ID_GPCDMA U(70)
19
20/**
steven kao05ee5822018-01-02 19:07:00 -080021 * Clock identifier for the SE device
22 */
23#define TEGRA_CLK_SE U(124)
24
25/**
Varun Wadekarb3741032017-09-25 13:27:45 -070026 * Function to initialise the IPC with the bpmp
27 */
28int32_t tegra_bpmp_ipc_init(void);
29
30/**
31 * Handler to reset a module
32 */
33int32_t tegra_bpmp_ipc_reset_module(uint32_t rst_id);
34
steven kao05ee5822018-01-02 19:07:00 -080035/**
36 * Handler to enable clock to a module. Only SE device is
37 * supported for now.
38 */
39int tegra_bpmp_ipc_enable_clock(uint32_t clk_id);
40
41/**
42 * Handler to disable clock to a module. Only SE device is
43 * supported for now.
44 */
45int tegra_bpmp_ipc_disable_clock(uint32_t clk_id);
46
Varun Wadekarb3741032017-09-25 13:27:45 -070047#endif /* __BPMP_IPC_H__ */