blob: 9f90fe030cf7e9246082a45ec0e0c55f43fb86f5 [file] [log] [blame]
Pankaj Gupta513a36d2020-12-09 14:02:39 +05301/*
2 * Copyright 2020 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8#include <endian.h>
9
10#include <common/debug.h>
11#include <csu.h>
12#include <lib/mmio.h>
13
14void enable_layerscape_ns_access(struct csu_ns_dev_st *csu_ns_dev,
15 uint32_t num, uintptr_t nxp_csu_addr)
16{
17 uint32_t *base = (uint32_t *)nxp_csu_addr;
18 uint32_t *reg;
19 uint32_t val;
20 int i;
21
22 for (i = 0; i < num; i++) {
23 reg = base + csu_ns_dev[i].ind / 2U;
24 val = be32toh(mmio_read_32((uintptr_t)reg));
25 if (csu_ns_dev[i].ind % 2U == 0U) {
26 val &= 0x0000ffffU;
27 val |= csu_ns_dev[i].val << 16U;
28 } else {
29 val &= 0xffff0000U;
30 val |= csu_ns_dev[i].val;
31 }
32 mmio_write_32((uintptr_t)reg, htobe32(val));
33 }
34}