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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001/*
Antonio Nino Diaz6942f052018-07-14 02:15:51 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00007#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <arch_helpers.h>
12#include <common/debug.h>
13#include <drivers/console.h>
14#include <lib/mmio.h>
15#include <lib/psci/psci.h>
16#include <plat/common/platform.h>
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000017
Andre Przywarabb6ef152019-07-09 11:44:14 +010018#include <rpi_hw.h>
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000019
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000020/* Make composite power state parameter till power level 0 */
21#if PSCI_EXTENDED_STATE_ID
22
23#define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
24 (((lvl0_state) << PSTATE_ID_SHIFT) | \
25 ((type) << PSTATE_TYPE_SHIFT))
26
27#else
28
29#define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
30 (((lvl0_state) << PSTATE_ID_SHIFT) | \
31 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
32 ((type) << PSTATE_TYPE_SHIFT))
33
34#endif /* PSCI_EXTENDED_STATE_ID */
35
36#define rpi3_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
37 (((lvl1_state) << PLAT_LOCAL_PSTATE_WIDTH) | \
38 rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
39
40/*
41 * The table storing the valid idle power states. Ensure that the
42 * array entries are populated in ascending order of state-id to
43 * enable us to use binary search during power state validation.
44 * The table must be terminated by a NULL entry.
45 */
46static const unsigned int rpi3_pm_idle_states[] = {
47 /* State-id - 0x01 */
48 rpi3_make_pwrstate_lvl1(PLAT_LOCAL_STATE_RUN, PLAT_LOCAL_STATE_RET,
49 MPIDR_AFFLVL0, PSTATE_TYPE_STANDBY),
50 /* State-id - 0x02 */
51 rpi3_make_pwrstate_lvl1(PLAT_LOCAL_STATE_RUN, PLAT_LOCAL_STATE_OFF,
52 MPIDR_AFFLVL0, PSTATE_TYPE_POWERDOWN),
53 /* State-id - 0x22 */
54 rpi3_make_pwrstate_lvl1(PLAT_LOCAL_STATE_OFF, PLAT_LOCAL_STATE_OFF,
55 MPIDR_AFFLVL1, PSTATE_TYPE_POWERDOWN),
56 0,
57};
58
59/*******************************************************************************
60 * Platform handler called to check the validity of the power state
61 * parameter. The power state parameter has to be a composite power state.
62 ******************************************************************************/
63static int rpi3_validate_power_state(unsigned int power_state,
64 psci_power_state_t *req_state)
65{
66 unsigned int state_id;
67 int i;
68
69 assert(req_state != 0);
70
71 /*
72 * Currently we are using a linear search for finding the matching
73 * entry in the idle power state array. This can be made a binary
74 * search if the number of entries justify the additional complexity.
75 */
76 for (i = 0; rpi3_pm_idle_states[i] != 0; i++) {
77 if (power_state == rpi3_pm_idle_states[i]) {
78 break;
79 }
80 }
81
82 /* Return error if entry not found in the idle state array */
83 if (!rpi3_pm_idle_states[i]) {
84 return PSCI_E_INVALID_PARAMS;
85 }
86
87 i = 0;
88 state_id = psci_get_pstate_id(power_state);
89
90 /* Parse the State ID and populate the state info parameter */
91 while (state_id) {
92 req_state->pwr_domain_state[i++] = state_id &
93 PLAT_LOCAL_PSTATE_MASK;
94 state_id >>= PLAT_LOCAL_PSTATE_WIDTH;
95 }
96
97 return PSCI_E_SUCCESS;
98}
99
100/*******************************************************************************
101 * Platform handler called when a CPU is about to enter standby.
102 ******************************************************************************/
103static void rpi3_cpu_standby(plat_local_state_t cpu_state)
104{
105 assert(cpu_state == PLAT_LOCAL_STATE_RET);
106
107 /*
108 * Enter standby state.
109 * dsb is good practice before using wfi to enter low power states
110 */
111 dsb();
112 wfi();
113}
114
115/*******************************************************************************
116 * Platform handler called when a power domain is about to be turned on. The
117 * mpidr determines the CPU to be turned on.
118 ******************************************************************************/
119static int rpi3_pwr_domain_on(u_register_t mpidr)
120{
121 int rc = PSCI_E_SUCCESS;
122 unsigned int pos = plat_core_pos_by_mpidr(mpidr);
123 uint64_t *hold_base = (uint64_t *)PLAT_RPI3_TM_HOLD_BASE;
124
125 assert(pos < PLATFORM_CORE_COUNT);
126
127 hold_base[pos] = PLAT_RPI3_TM_HOLD_STATE_GO;
128
129 /* Make sure that the write has completed */
130 dsb();
131 isb();
132
133 sev();
134
135 return rc;
136}
137
138/*******************************************************************************
139 * Platform handler called when a power domain has just been powered on after
140 * being turned off earlier. The target_state encodes the low power state that
141 * each level has woken up from.
142 ******************************************************************************/
Florian La Rocheae929572019-01-28 20:39:51 +0100143static void rpi3_pwr_domain_on_finish(const psci_power_state_t *target_state)
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000144{
145 assert(target_state->pwr_domain_state[MPIDR_AFFLVL0] ==
146 PLAT_LOCAL_STATE_OFF);
147}
148
149/*******************************************************************************
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100150 * Platform handlers for system reset and system off.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000151 ******************************************************************************/
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000152
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100153/* 10 ticks (Watchdog timer = Timer clock / 16) */
154#define RESET_TIMEOUT U(10)
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000155
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100156static void __dead2 rpi3_watchdog_reset(void)
157{
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000158 uint32_t rstc;
159
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000160 console_flush();
161
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100162 dsbsy();
163 isb();
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000164
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100165 mmio_write_32(RPI3_PM_BASE + RPI3_PM_WDOG_OFFSET,
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000166 RPI3_PM_PASSWORD | RESET_TIMEOUT);
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100167
168 rstc = mmio_read_32(RPI3_PM_BASE + RPI3_PM_RSTC_OFFSET);
169 rstc &= ~RPI3_PM_RSTC_WRCFG_MASK;
170 rstc |= RPI3_PM_PASSWORD | RPI3_PM_RSTC_WRCFG_FULL_RESET;
171 mmio_write_32(RPI3_PM_BASE + RPI3_PM_RSTC_OFFSET, rstc);
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000172
173 for (;;) {
174 wfi();
175 }
176}
177
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100178static void __dead2 rpi3_system_reset(void)
179{
180 INFO("rpi3: PSCI_SYSTEM_RESET: Invoking watchdog reset\n");
181
182 rpi3_watchdog_reset();
183}
184
185static void __dead2 rpi3_system_off(void)
186{
187 uint32_t rsts;
188
189 INFO("rpi3: PSCI_SYSTEM_OFF: Invoking watchdog reset\n");
190
191 /*
192 * This function doesn't actually make the Raspberry Pi turn itself off,
193 * the hardware doesn't allow it. It simply reboots it and the RSTS
194 * value tells the bootcode.bin firmware not to continue the regular
195 * bootflow and to stay in a low power mode.
196 */
197
198 rsts = mmio_read_32(RPI3_PM_BASE + RPI3_PM_RSTS_OFFSET);
199 rsts |= RPI3_PM_PASSWORD | RPI3_PM_RSTS_WRCFG_HALT;
200 mmio_write_32(RPI3_PM_BASE + RPI3_PM_RSTS_OFFSET, rsts);
201
202 rpi3_watchdog_reset();
203}
204
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000205/*******************************************************************************
206 * Platform handlers and setup function.
207 ******************************************************************************/
208static const plat_psci_ops_t plat_rpi3_psci_pm_ops = {
209 .cpu_standby = rpi3_cpu_standby,
210 .pwr_domain_on = rpi3_pwr_domain_on,
211 .pwr_domain_on_finish = rpi3_pwr_domain_on_finish,
Antonio Nino Diaz6942f052018-07-14 02:15:51 +0100212 .system_off = rpi3_system_off,
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000213 .system_reset = rpi3_system_reset,
214 .validate_power_state = rpi3_validate_power_state,
215};
216
217int plat_setup_psci_ops(uintptr_t sec_entrypoint,
218 const plat_psci_ops_t **psci_ops)
219{
Antonio Nino Diazbc297332018-07-14 01:22:43 +0100220 uintptr_t *entrypoint = (void *) PLAT_RPI3_TM_ENTRYPOINT;
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000221
Antonio Nino Diazbc297332018-07-14 01:22:43 +0100222 *entrypoint = sec_entrypoint;
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000223 *psci_ops = &plat_rpi3_psci_pm_ops;
224
225 return 0;
226}